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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/AArch64/arm64-fmuladd.ll | |
parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/AArch64/arm64-fmuladd.ll')
-rw-r--r-- | test/CodeGen/AArch64/arm64-fmuladd.ll | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/test/CodeGen/AArch64/arm64-fmuladd.ll b/test/CodeGen/AArch64/arm64-fmuladd.ll index 6c5eeca..cfc8b5f 100644 --- a/test/CodeGen/AArch64/arm64-fmuladd.ll +++ b/test/CodeGen/AArch64/arm64-fmuladd.ll @@ -4,9 +4,9 @@ define float @test_f32(float* %A, float* %B, float* %C) nounwind { ;CHECK-LABEL: test_f32: ;CHECK: fmadd ;CHECK-NOT: fmadd - %tmp1 = load float* %A - %tmp2 = load float* %B - %tmp3 = load float* %C + %tmp1 = load float, float* %A + %tmp2 = load float, float* %B + %tmp3 = load float, float* %C %tmp4 = call float @llvm.fmuladd.f32(float %tmp1, float %tmp2, float %tmp3) ret float %tmp4 } @@ -15,9 +15,9 @@ define <2 x float> @test_v2f32(<2 x float>* %A, <2 x float>* %B, <2 x float>* %C ;CHECK-LABEL: test_v2f32: ;CHECK: fmla.2s ;CHECK-NOT: fmla.2s - %tmp1 = load <2 x float>* %A - %tmp2 = load <2 x float>* %B - %tmp3 = load <2 x float>* %C + %tmp1 = load <2 x float>, <2 x float>* %A + %tmp2 = load <2 x float>, <2 x float>* %B + %tmp3 = load <2 x float>, <2 x float>* %C %tmp4 = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %tmp1, <2 x float> %tmp2, <2 x float> %tmp3) ret <2 x float> %tmp4 } @@ -26,9 +26,9 @@ define <4 x float> @test_v4f32(<4 x float>* %A, <4 x float>* %B, <4 x float>* %C ;CHECK-LABEL: test_v4f32: ;CHECK: fmla.4s ;CHECK-NOT: fmla.4s - %tmp1 = load <4 x float>* %A - %tmp2 = load <4 x float>* %B - %tmp3 = load <4 x float>* %C + %tmp1 = load <4 x float>, <4 x float>* %A + %tmp2 = load <4 x float>, <4 x float>* %B + %tmp3 = load <4 x float>, <4 x float>* %C %tmp4 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %tmp1, <4 x float> %tmp2, <4 x float> %tmp3) ret <4 x float> %tmp4 } @@ -38,9 +38,9 @@ define <8 x float> @test_v8f32(<8 x float>* %A, <8 x float>* %B, <8 x float>* %C ;CHECK: fmla.4s ;CHECK: fmla.4s ;CHECK-NOT: fmla.4s - %tmp1 = load <8 x float>* %A - %tmp2 = load <8 x float>* %B - %tmp3 = load <8 x float>* %C + %tmp1 = load <8 x float>, <8 x float>* %A + %tmp2 = load <8 x float>, <8 x float>* %B + %tmp3 = load <8 x float>, <8 x float>* %C %tmp4 = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> %tmp1, <8 x float> %tmp2, <8 x float> %tmp3) ret <8 x float> %tmp4 } @@ -49,9 +49,9 @@ define double @test_f64(double* %A, double* %B, double* %C) nounwind { ;CHECK-LABEL: test_f64: ;CHECK: fmadd ;CHECK-NOT: fmadd - %tmp1 = load double* %A - %tmp2 = load double* %B - %tmp3 = load double* %C + %tmp1 = load double, double* %A + %tmp2 = load double, double* %B + %tmp3 = load double, double* %C %tmp4 = call double @llvm.fmuladd.f64(double %tmp1, double %tmp2, double %tmp3) ret double %tmp4 } @@ -60,9 +60,9 @@ define <2 x double> @test_v2f64(<2 x double>* %A, <2 x double>* %B, <2 x double> ;CHECK-LABEL: test_v2f64: ;CHECK: fmla.2d ;CHECK-NOT: fmla.2d - %tmp1 = load <2 x double>* %A - %tmp2 = load <2 x double>* %B - %tmp3 = load <2 x double>* %C + %tmp1 = load <2 x double>, <2 x double>* %A + %tmp2 = load <2 x double>, <2 x double>* %B + %tmp3 = load <2 x double>, <2 x double>* %C %tmp4 = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %tmp1, <2 x double> %tmp2, <2 x double> %tmp3) ret <2 x double> %tmp4 } @@ -72,9 +72,9 @@ define <4 x double> @test_v4f64(<4 x double>* %A, <4 x double>* %B, <4 x double> ;CHECK: fmla.2d ;CHECK: fmla.2d ;CHECK-NOT: fmla.2d - %tmp1 = load <4 x double>* %A - %tmp2 = load <4 x double>* %B - %tmp3 = load <4 x double>* %C + %tmp1 = load <4 x double>, <4 x double>* %A + %tmp2 = load <4 x double>, <4 x double>* %B + %tmp3 = load <4 x double>, <4 x double>* %C %tmp4 = call <4 x double> @llvm.fmuladd.v4f64(<4 x double> %tmp1, <4 x double> %tmp2, <4 x double> %tmp3) ret <4 x double> %tmp4 } |