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author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /test/CodeGen/AArch64/arm64-inline-asm-zero-reg-error.ll | |
parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'test/CodeGen/AArch64/arm64-inline-asm-zero-reg-error.ll')
-rw-r--r-- | test/CodeGen/AArch64/arm64-inline-asm-zero-reg-error.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/arm64-inline-asm-zero-reg-error.ll b/test/CodeGen/AArch64/arm64-inline-asm-zero-reg-error.ll new file mode 100644 index 0000000..6bfce8f --- /dev/null +++ b/test/CodeGen/AArch64/arm64-inline-asm-zero-reg-error.ll @@ -0,0 +1,11 @@ +; RUN: not llc < %s -march=arm64 2>&1 | FileCheck %s + + +; The 'z' constraint allocates either xzr or wzr, but obviously an input of 1 is +; incompatible. +define void @test_bad_zero_reg() { + tail call void asm sideeffect "USE($0)", "z"(i32 1) nounwind +; CHECK: error: invalid operand for inline asm constraint 'z' + + ret void +} |