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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/AArch64/arm64-misched-basic-A57.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/AArch64/arm64-misched-basic-A57.ll')
-rw-r--r-- | test/CodeGen/AArch64/arm64-misched-basic-A57.ll | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/test/CodeGen/AArch64/arm64-misched-basic-A57.ll b/test/CodeGen/AArch64/arm64-misched-basic-A57.ll index 238474a..fac5f8a 100644 --- a/test/CodeGen/AArch64/arm64-misched-basic-A57.ll +++ b/test/CodeGen/AArch64/arm64-misched-basic-A57.ll @@ -9,8 +9,8 @@ ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s ; CHECK: ********** MI Scheduling ********** ; CHECK: main:BB#2 -; CHECK LDR -; CHECK Latency : 4 +; CHECK: LDR +; CHECK: Latency : 4 ; CHECK: *** Final schedule for BB#2 *** ; CHECK: LDR ; CHECK: LDR @@ -41,31 +41,31 @@ entry: br label %for.cond for.cond: ; preds = %for.inc, %entry - %2 = load i32* %i, align 4 + %2 = load i32, i32* %i, align 4 %cmp = icmp slt i32 %2, 8 br i1 %cmp, label %for.body, label %for.end for.body: ; preds = %for.cond - %3 = load i32* %yy, align 4 - %4 = load i32* %i, align 4 + %3 = load i32, i32* %yy, align 4 + %4 = load i32, i32* %i, align 4 %idxprom = sext i32 %4 to i64 - %arrayidx = getelementptr inbounds [8 x i32]* %x, i32 0, i64 %idxprom - %5 = load i32* %arrayidx, align 4 + %arrayidx = getelementptr inbounds [8 x i32], [8 x i32]* %x, i32 0, i64 %idxprom + %5 = load i32, i32* %arrayidx, align 4 %add = add nsw i32 %5, 1 store i32 %add, i32* %xx, align 4 - %6 = load i32* %xx, align 4 + %6 = load i32, i32* %xx, align 4 %add1 = add nsw i32 %6, 12 store i32 %add1, i32* %xx, align 4 - %7 = load i32* %xx, align 4 + %7 = load i32, i32* %xx, align 4 %add2 = add nsw i32 %7, 23 store i32 %add2, i32* %xx, align 4 - %8 = load i32* %xx, align 4 + %8 = load i32, i32* %xx, align 4 %add3 = add nsw i32 %8, 34 store i32 %add3, i32* %xx, align 4 - %9 = load i32* %i, align 4 + %9 = load i32, i32* %i, align 4 %idxprom4 = sext i32 %9 to i64 - %arrayidx5 = getelementptr inbounds [8 x i32]* %y, i32 0, i64 %idxprom4 - %10 = load i32* %arrayidx5, align 4 + %arrayidx5 = getelementptr inbounds [8 x i32], [8 x i32]* %y, i32 0, i64 %idxprom4 + %10 = load i32, i32* %arrayidx5, align 4 %add4 = add nsw i32 %9, %add %add5 = add nsw i32 %10, %add1 @@ -92,14 +92,14 @@ for.body: ; preds = %for.cond br label %for.inc for.inc: ; preds = %for.body - %11 = load i32* %i, align 4 + %11 = load i32, i32* %i, align 4 %inc = add nsw i32 %11, 1 store i32 %inc, i32* %i, align 4 br label %for.cond for.end: ; preds = %for.cond - %12 = load i32* %xx, align 4 - %13 = load i32* %yy, align 4 + %12 = load i32, i32* %xx, align 4 + %13 = load i32, i32* %yy, align 4 %add67 = add nsw i32 %12, %13 ret i32 %add67 } |