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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 21:22:52 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2015-04-10 21:23:04 +0000
commit31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/AArch64/arm64-zextload-unscaled.ll
parentc75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff)
parent4c5e43da7792f75567b693105cc53e3f1992ad98 (diff)
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Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/AArch64/arm64-zextload-unscaled.ll')
-rw-r--r--test/CodeGen/AArch64/arm64-zextload-unscaled.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/AArch64/arm64-zextload-unscaled.ll b/test/CodeGen/AArch64/arm64-zextload-unscaled.ll
index c475dbd..321cf10 100644
--- a/test/CodeGen/AArch64/arm64-zextload-unscaled.ll
+++ b/test/CodeGen/AArch64/arm64-zextload-unscaled.ll
@@ -6,8 +6,8 @@ define void @test_zextloadi1_unscaled(i1* %base) {
; CHECK-LABEL: test_zextloadi1_unscaled:
; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
- %addr = getelementptr i1* %base, i32 -7
- %val = load i1* %addr, align 1
+ %addr = getelementptr i1, i1* %base, i32 -7
+ %val = load i1, i1* %addr, align 1
%extended = zext i1 %val to i32
store i32 %extended, i32* @var32, align 4
@@ -18,8 +18,8 @@ define void @test_zextloadi8_unscaled(i8* %base) {
; CHECK-LABEL: test_zextloadi8_unscaled:
; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
- %addr = getelementptr i8* %base, i32 -7
- %val = load i8* %addr, align 1
+ %addr = getelementptr i8, i8* %base, i32 -7
+ %val = load i8, i8* %addr, align 1
%extended = zext i8 %val to i32
store i32 %extended, i32* @var32, align 4
@@ -30,8 +30,8 @@ define void @test_zextloadi16_unscaled(i16* %base) {
; CHECK-LABEL: test_zextloadi16_unscaled:
; CHECK: ldurh {{w[0-9]+}}, [{{x[0-9]+}}, #-14]
- %addr = getelementptr i16* %base, i32 -7
- %val = load i16* %addr, align 2
+ %addr = getelementptr i16, i16* %base, i32 -7
+ %val = load i16, i16* %addr, align 2
%extended = zext i16 %val to i32
store i32 %extended, i32* @var32, align 4