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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/AArch64/dag-combine-invaraints.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/AArch64/dag-combine-invaraints.ll')
| -rw-r--r-- | test/CodeGen/AArch64/dag-combine-invaraints.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/dag-combine-invaraints.ll b/test/CodeGen/AArch64/dag-combine-invaraints.ll new file mode 100644 index 0000000..115fc64 --- /dev/null +++ b/test/CodeGen/AArch64/dag-combine-invaraints.ll @@ -0,0 +1,36 @@ +; RUN: llc -mtriple=arm64-apple-darwin8.0 -relocation-model=pic -O1 < %s | FileCheck %s + +@.str2 = private unnamed_addr constant [9 x i8] c"_%d____\0A\00", align 1 + +; Function Attrs: nounwind ssp +define i32 @main(i32 %argc, i8** %argv) #0 { +main_: + %tmp = alloca i32, align 4 + %i32T = alloca i32, align 4 + %i32F = alloca i32, align 4 + %i32X = alloca i32, align 4 + store i32 0, i32* %tmp + store i32 15, i32* %i32T, align 4 + store i32 5, i32* %i32F, align 4 + %tmp6 = load i32* %tmp, align 4 + %tmp7 = icmp ne i32 %tmp6, 0 + %tmp8 = xor i1 %tmp7, true + %tmp9 = load i32* %i32T, align 4 + %tmp10 = load i32* %i32F, align 4 + %DHSelect = select i1 %tmp8, i32 %tmp9, i32 %tmp10 + store i32 %DHSelect, i32* %i32X, align 4 + %tmp15 = load i32* %i32X, align 4 + %tmp17 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str2, i32 0, i32 0), i32 %tmp15) + ret i32 0 + +; CHECK: main: +; CHECK-DAG: movz +; CHECK-DAG: orr +; CHECK: csel +} + + +declare i32 @printf(i8*, ...) #1 + +attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } |