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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-06 11:46:36 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-18 10:52:30 -0700 |
commit | 2c3e0051c31c3f5b2328b447eadf1cf9c4427442 (patch) | |
tree | c0104029af14e9f47c2ef58ca60e6137691f3c9b /test/CodeGen/AArch64/fp16-instructions.ll | |
parent | e1bc145815f4334641be19f1c45ecf85d25b6e5a (diff) | |
download | external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.zip external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.gz external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.bz2 |
Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
(cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
Diffstat (limited to 'test/CodeGen/AArch64/fp16-instructions.ll')
-rw-r--r-- | test/CodeGen/AArch64/fp16-instructions.ll | 109 |
1 files changed, 0 insertions, 109 deletions
diff --git a/test/CodeGen/AArch64/fp16-instructions.ll b/test/CodeGen/AArch64/fp16-instructions.ll deleted file mode 100644 index ba96694..0000000 --- a/test/CodeGen/AArch64/fp16-instructions.ll +++ /dev/null @@ -1,109 +0,0 @@ -; RUN: llc < %s -mtriple=aarch64-none-eabi | FileCheck %s - -define half @add_h(half %a, half %b) { -entry: -; CHECK-LABEL: add_h: -; CHECK-DAG: fcvt [[OP1:s[0-9]+]], h0 -; CHECK-DAG: fcvt [[OP2:s[0-9]+]], h1 -; CHECK: fadd [[RES:s[0-9]+]], [[OP1]], [[OP2]] -; CHECK: fcvt h0, [[RES]] - %0 = fadd half %a, %b - ret half %0 -} - - -define half @sub_h(half %a, half %b) { -entry: -; CHECK-LABEL: sub_h: -; CHECK-DAG: fcvt [[OP1:s[0-9]+]], h0 -; CHECK-DAG: fcvt [[OP2:s[0-9]+]], h1 -; CHECK: fsub [[RES:s[0-9]+]], [[OP1]], [[OP2]] -; CHECK: fcvt h0, [[RES]] - %0 = fsub half %a, %b - ret half %0 -} - - -define half @mul_h(half %a, half %b) { -entry: -; CHECK-LABEL: mul_h: -; CHECK-DAG: fcvt [[OP1:s[0-9]+]], h0 -; CHECK-DAG: fcvt [[OP2:s[0-9]+]], h1 -; CHECK: fmul [[RES:s[0-9]+]], [[OP1]], [[OP2]] -; CHECK: fcvt h0, [[RES]] - %0 = fmul half %a, %b - ret half %0 -} - - -define half @div_h(half %a, half %b) { -entry: -; CHECK-LABEL: div_h: -; CHECK-DAG: fcvt [[OP1:s[0-9]+]], h0 -; CHECK-DAG: fcvt [[OP2:s[0-9]+]], h1 -; CHECK: fdiv [[RES:s[0-9]+]], [[OP1]], [[OP2]] -; CHECK: fcvt h0, [[RES]] - %0 = fdiv half %a, %b - ret half %0 -} - - -define half @load_h(half* %a) { -entry: -; CHECK-LABEL: load_h: -; CHECK: ldr h0, [x0] - %0 = load half, half* %a, align 4 - ret half %0 -} - - -define void @store_h(half* %a, half %b) { -entry: -; CHECK-LABEL: store_h: -; CHECK: str h0, [x0] - store half %b, half* %a, align 4 - ret void -} - -define half @s_to_h(float %a) { -; CHECK-LABEL: s_to_h: -; CHECK: fcvt h0, s0 - %1 = fptrunc float %a to half - ret half %1 -} - -define half @d_to_h(double %a) { -; CHECK-LABEL: d_to_h: -; CHECK: fcvt h0, d0 - %1 = fptrunc double %a to half - ret half %1 -} - -define float @h_to_s(half %a) { -; CHECK-LABEL: h_to_s: -; CHECK: fcvt s0, h0 - %1 = fpext half %a to float - ret float %1 -} - -define double @h_to_d(half %a) { -; CHECK-LABEL: h_to_d: -; CHECK: fcvt d0, h0 - %1 = fpext half %a to double - ret double %1 -} - -define half @bitcast_i_to_h(i16 %a) { -; CHECK-LABEL: bitcast_i_to_h: -; CHECK: fmov s0, w0 - %1 = bitcast i16 %a to half - ret half %1 -} - - -define i16 @bitcast_h_to_i(half %a) { -; CHECK-LABEL: bitcast_h_to_i: -; CHECK: fmov w0, s0 - %1 = bitcast half %a to i16 - ret i16 %1 -} |