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author | Bill Wendling <isanbard@gmail.com> | 2013-11-25 05:38:48 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-11-25 05:38:48 +0000 |
commit | e8bb6e26b83e08631ad336bb0d8076787b858c34 (patch) | |
tree | 39b8a0ef4c4655e7b1cfd321eb8d68b83e0e56dd /test/CodeGen/AArch64 | |
parent | 83a5c7898e26166199ef8a55527d176b5dc4cb04 (diff) | |
download | external_llvm-e8bb6e26b83e08631ad336bb0d8076787b858c34.zip external_llvm-e8bb6e26b83e08631ad336bb0d8076787b858c34.tar.gz external_llvm-e8bb6e26b83e08631ad336bb0d8076787b858c34.tar.bz2 |
Merging r195330:
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r195330 | apazos | 2013-11-21 00:16:15 -0800 (Thu, 21 Nov 2013) | 5 lines
Implemented Neon scalar vdup_lane intrinsics.
Fixed scalar dup alias and added test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195612 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64')
-rw-r--r-- | test/CodeGen/AArch64/neon-scalar-copy.ll | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/neon-scalar-copy.ll b/test/CodeGen/AArch64/neon-scalar-copy.ll new file mode 100644 index 0000000..59f6237 --- /dev/null +++ b/test/CodeGen/AArch64/neon-scalar-copy.ll @@ -0,0 +1,80 @@ +; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s + +define float @test_dup_sv2S(<2 x float> %v) { + ;CHECK: test_dup_sv2S + ;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[1] + %tmp1 = extractelement <2 x float> %v, i32 1 + ret float %tmp1 +} + +define float @test_dup_sv4S(<4 x float> %v) { + ;CHECK: test_dup_sv4S + ;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[0] + %tmp1 = extractelement <4 x float> %v, i32 0 + ret float %tmp1 +} + +define double @test_dup_dvD(<1 x double> %v) { + ;CHECK: test_dup_dvD + ;CHECK-NOT: dup {{d[0-31]+}}, {{v[0-31]+}}.d[0] + ;CHECK: ret + %tmp1 = extractelement <1 x double> %v, i32 0 + ret double %tmp1 +} + +define double @test_dup_dv2D(<2 x double> %v) { + ;CHECK: test_dup_dv2D + ;CHECK: dup {{d[0-31]+}}, {{v[0-31]+}}.d[1] + %tmp1 = extractelement <2 x double> %v, i32 1 + ret double %tmp1 +} + +define <1 x i8> @test_vector_dup_bv16B(<16 x i8> %v1) { + ;CHECK: test_vector_dup_bv16B + ;CHECK: dup {{b[0-31]+}}, {{v[0-31]+}}.b[14] + %shuffle.i = shufflevector <16 x i8> %v1, <16 x i8> undef, <1 x i32> <i32 14> + ret <1 x i8> %shuffle.i +} + +define <1 x i8> @test_vector_dup_bv8B(<8 x i8> %v1) { + ;CHECK: test_vector_dup_bv8B + ;CHECK: dup {{b[0-31]+}}, {{v[0-31]+}}.b[7] + %shuffle.i = shufflevector <8 x i8> %v1, <8 x i8> undef, <1 x i32> <i32 7> + ret <1 x i8> %shuffle.i +} + +define <1 x i16> @test_vector_dup_hv8H(<8 x i16> %v1) { + ;CHECK: test_vector_dup_hv8H + ;CHECK: dup {{h[0-31]+}}, {{v[0-31]+}}.h[7] + %shuffle.i = shufflevector <8 x i16> %v1, <8 x i16> undef, <1 x i32> <i32 7> + ret <1 x i16> %shuffle.i +} + +define <1 x i16> @test_vector_dup_hv4H(<4 x i16> %v1) { + ;CHECK: test_vector_dup_hv4H + ;CHECK: dup {{h[0-31]+}}, {{v[0-31]+}}.h[3] + %shuffle.i = shufflevector <4 x i16> %v1, <4 x i16> undef, <1 x i32> <i32 3> + ret <1 x i16> %shuffle.i +} + +define <1 x i32> @test_vector_dup_sv4S(<4 x i32> %v1) { + ;CHECK: test_vector_dup_sv4S + ;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[3] + %shuffle = shufflevector <4 x i32> %v1, <4 x i32> undef, <1 x i32> <i32 3> + ret <1 x i32> %shuffle +} + +define <1 x i32> @test_vector_dup_sv2S(<2 x i32> %v1) { + ;CHECK: test_vector_dup_sv2S + ;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[1] + %shuffle = shufflevector <2 x i32> %v1, <2 x i32> undef, <1 x i32> <i32 1> + ret <1 x i32> %shuffle +} + +define <1 x i64> @test_vector_dup_dv2D(<2 x i64> %v1) { + ;CHECK: test_vector_dup_dv2D + ;CHECK: dup {{d[0-31]+}}, {{v[0-31]+}}.d[1] + %shuffle.i = shufflevector <2 x i64> %v1, <2 x i64> undef, <1 x i32> <i32 1> + ret <1 x i64> %shuffle.i +} + |