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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
| commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll | |
| parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
| download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 | |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll')
| -rw-r--r-- | test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll b/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll index a656c49..e277b4c 100644 --- a/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll +++ b/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll @@ -13,17 +13,17 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store <4 x i32> %v, <4 x i32>* %v_addr store i32 %f, i32* %f_addr - %1 = load <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1] - %2 = load i32* %f_addr, align 4 ; <i32> [#uses=1] + %1 = load <4 x i32>, <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1] + %2 = load i32, i32* %f_addr, align 4 ; <i32> [#uses=1] %3 = insertelement <4 x i32> undef, i32 %2, i32 0 ; <<4 x i32>> [#uses=1] %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>> [#uses=1] %5 = mul <4 x i32> %1, %4 ; <<4 x i32>> [#uses=1] store <4 x i32> %5, <4 x i32>* %0, align 16 - %6 = load <4 x i32>* %0, align 16 ; <<4 x i32>> [#uses=1] + %6 = load <4 x i32>, <4 x i32>* %0, align 16 ; <<4 x i32>> [#uses=1] store <4 x i32> %6, <4 x i32>* %retval, align 16 br label %return return: ; preds = %entry - %retval1 = load <4 x i32>* %retval ; <<4 x i32>> [#uses=1] + %retval1 = load <4 x i32>, <4 x i32>* %retval ; <<4 x i32>> [#uses=1] ret <4 x i32> %retval1 } |