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authorEvan Cheng <evan.cheng@apple.com>2010-10-06 06:27:31 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-10-06 06:27:31 +0000
commita0792de66c8364d47b0a688c7f408efb7b10f31b (patch)
tree74720b528520e7d3702afc6ed850dc6a6e1ce99e /test/CodeGen/ARM/arguments.ll
parent7f5124829ffcf75f598b024ec40cc83753eb72d4 (diff)
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- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling itineraries isn't sufficient. e.g. variable_ops instructions such as ARM::ldm. This also allows target without scheduling itineraries to compute operand latencies. e.g. X86 can return (approximated) latencies for high latency instructions such as division. - Compute operand latencies for those defined by load multiple instructions, e.g. ldm and those used by store multiple instructions, e.g. stm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/arguments.ll')
-rw-r--r--test/CodeGen/ARM/arguments.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/arguments.ll b/test/CodeGen/ARM/arguments.ll
index bb7853e..c7fcb97 100644
--- a/test/CodeGen/ARM/arguments.ll
+++ b/test/CodeGen/ARM/arguments.ll
@@ -13,8 +13,8 @@ define i32 @f1(i32 %a, i64 %b) {
; test that allocating the double to r2/r3 makes r1 unavailable on gnueabi.
define i32 @f2() nounwind optsize {
; ELF: f2:
-; ELF: mov r0, #128
-; ELF: str r0, [sp]
+; ELF: mov [[REGISTER:(r[0-9]+)]], #128
+; ELF: str [[REGISTER]], [sp]
; DARWIN: f2:
; DARWIN: mov r3, #128
entry: