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author | Derek Schuff <dschuff@google.com> | 2013-05-14 16:26:38 +0000 |
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committer | Derek Schuff <dschuff@google.com> | 2013-05-14 16:26:38 +0000 |
commit | ed788b62830c26bd1f5d23d73a6337c88b66ab61 (patch) | |
tree | 6c3d5ba1af380c2add0fe390c47ccf3ea90b83b2 /test/CodeGen/ARM/fast-isel-br-const.ll | |
parent | ded53bf4dd499f213334400fa870d0c7896d1d0d (diff) | |
download | external_llvm-ed788b62830c26bd1f5d23d73a6337c88b66ab61.zip external_llvm-ed788b62830c26bd1f5d23d73a6337c88b66ab61.tar.gz external_llvm-ed788b62830c26bd1f5d23d73a6337c88b66ab61.tar.bz2 |
Fix ARM FastISel tests, as a first step to enabling ARM FastISel
ARM FastISel is currently only enabled for iOS non-Thumb1, and I'm working on
enabling it for other targets. As a first step I've fixed some of the tests.
Changes to ARM FastISel tests:
- Different triples don't generate the same relocations (especially
movw/movt versus constant pool loads). Use a regex to allow either.
- Mangling is different. Use a regex to allow either.
- The reserved registers are sometimes different, so registers get
allocated in a different order. Capture the names only where this
occurs.
- Add -verify-machineinstrs to some tests where it works. It doesn't
work everywhere it should yet.
- Add -fast-isel-abort to many tests that didn't have it before.
- Split out the VarArg test from fast-isel-call.ll into its own
test. This simplifies test setup because of --check-prefix.
Patch by JF Bastien
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181801 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-br-const.ll')
-rw-r--r-- | test/CodeGen/ARM/fast-isel-br-const.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/ARM/fast-isel-br-const.ll b/test/CodeGen/ARM/fast-isel-br-const.ll index 4e6efd2..aefe200 100644 --- a/test/CodeGen/ARM/fast-isel-br-const.ll +++ b/test/CodeGen/ARM/fast-isel-br-const.ll @@ -7,8 +7,8 @@ entry: ; ARM: t1: %x = add i32 %a, %b br i1 1, label %if.then, label %if.else -; THUMB-NOT: b LBB0_1 -; ARM-NOT: b LBB0_1 +; THUMB-NOT: b {{\.?}}LBB0_1 +; ARM-NOT: b {{\.?}}LBB0_1 if.then: ; preds = %entry call void @foo1() @@ -16,8 +16,8 @@ if.then: ; preds = %entry if.else: ; preds = %entry br i1 0, label %if.then2, label %if.else3 -; THUMB: b LBB0_4 -; ARM: b LBB0_4 +; THUMB: b {{\.?}}LBB0_4 +; ARM: b {{\.?}}LBB0_4 if.then2: ; preds = %if.else call void @foo2() @@ -26,8 +26,8 @@ if.then2: ; preds = %if.else if.else3: ; preds = %if.else %y = sub i32 %a, %b br i1 1, label %if.then5, label %if.end -; THUMB-NOT: b LBB0_5 -; ARM-NOT: b LBB0_5 +; THUMB-NOT: b {{\.?}}LBB0_5 +; ARM-NOT: b {{\.?}}LBB0_5 if.then5: ; preds = %if.else3 call void @foo1() |