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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/ARM/fast-isel-vararg.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-vararg.ll')
-rw-r--r-- | test/CodeGen/ARM/fast-isel-vararg.ll | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/test/CodeGen/ARM/fast-isel-vararg.ll b/test/CodeGen/ARM/fast-isel-vararg.ll index 3ff2b15..aa37e7d 100644 --- a/test/CodeGen/ARM/fast-isel-vararg.ll +++ b/test/CodeGen/ARM/fast-isel-vararg.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM -; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM -; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB define i32 @VarArg() nounwind { entry: @@ -10,11 +10,11 @@ entry: %m = alloca i32, align 4 %n = alloca i32, align 4 %tmp = alloca i32, align 4 - %0 = load i32* %i, align 4 - %1 = load i32* %j, align 4 - %2 = load i32* %k, align 4 - %3 = load i32* %m, align 4 - %4 = load i32* %n, align 4 + %0 = load i32, i32* %i, align 4 + %1 = load i32, i32* %j, align 4 + %2 = load i32, i32* %k, align 4 + %3 = load i32, i32* %m, align 4 + %4 = load i32, i32* %n, align 4 ; ARM: VarArg ; ARM: mov [[FP:r[0-9]+]], sp ; ARM: sub sp, sp, #32 @@ -39,7 +39,7 @@ entry: ; THUMB: bl {{_?}}CallVariadic %call = call i32 (i32, ...)* @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) store i32 %call, i32* %tmp, align 4 - %5 = load i32* %tmp, align 4 + %5 = load i32, i32* %tmp, align 4 ret i32 %5 } |