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authorCameron Zwarich <zwarich@apple.com>2011-04-02 02:40:43 +0000
committerCameron Zwarich <zwarich@apple.com>2011-04-02 02:40:43 +0000
commit4071a711126a2a75585a32b96bb5d15ea267a915 (patch)
tree1e693a94ba4f9c310640ecc3540de493f3545a59 /test/CodeGen/ARM/fp-arg-shuffle.ll
parented3caf90866e183380a06c0ae49101204a9f3c28 (diff)
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Do some peephole optimizations to remove pointless VMOVs from Neon to integer
registers that arise from argument shuffling with the soft float ABI. These instructions are particularly slow on Cortex A8. This fixes one half of <rdar://problem/8674845>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128759 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fp-arg-shuffle.ll')
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diff --git a/test/CodeGen/ARM/fp-arg-shuffle.ll b/test/CodeGen/ARM/fp-arg-shuffle.ll
new file mode 100644
index 0000000..59303ac
--- /dev/null
+++ b/test/CodeGen/ARM/fp-arg-shuffle.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mattr=+neon -float-abi=soft | FileCheck %s
+
+; CHECK: function1
+; CHECK-NOT: vmov r
+define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp {
+entry:
+ %call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind
+ ret double %call
+}
+
+declare double @function2(double, double, double, double, double, double)