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author | Jim Grosbach <grosbach@apple.com> | 2010-09-17 21:58:46 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2010-09-17 21:58:46 +0000 |
commit | f75b6bcb3ed46c18b56063581075370cff448952 (patch) | |
tree | 29c21d12e3c168895df12786e2ed430b237c5e08 /test/CodeGen/ARM/ispositive.ll | |
parent | 1cc1bc86986faee8a7f52ff338671b5eb7371e58 (diff) | |
download | external_llvm-f75b6bcb3ed46c18b56063581075370cff448952.zip external_llvm-f75b6bcb3ed46c18b56063581075370cff448952.tar.gz external_llvm-f75b6bcb3ed46c18b56063581075370cff448952.tar.bz2 |
Update tests to handle MC-inst instruction printing of shift operations. The
legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while
the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic
is correct and preferred according the ARM documentation (A8.6.98). The former
are pseudo-instructions for the latter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114221 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/ispositive.ll')
-rw-r--r-- | test/CodeGen/ARM/ispositive.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll index 245ed51..2f1a2cf 100644 --- a/test/CodeGen/ARM/ispositive.ll +++ b/test/CodeGen/ARM/ispositive.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm | FileCheck %s define i32 @test1(i32 %X) { -; CHECK: mov r0, r0, lsr #31 +; CHECK: lsr{{.*}}#31 entry: icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] zext i1 %0 to i32 ; <i32>:1 [#uses=1] |