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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/ARM/krait-cpu-div-attribute.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/ARM/krait-cpu-div-attribute.ll')
-rw-r--r-- | test/CodeGen/ARM/krait-cpu-div-attribute.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/krait-cpu-div-attribute.ll b/test/CodeGen/ARM/krait-cpu-div-attribute.ll index b7a1dcc..222664a 100644 --- a/test/CodeGen/ARM/krait-cpu-div-attribute.ll +++ b/test/CodeGen/ARM/krait-cpu-div-attribute.ll @@ -7,7 +7,7 @@ ; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=krait | FileCheck %s --check-prefix=DIV_EXTENSION ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 | FileCheck %s --check-prefix=NODIV_KRAIT ; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-a9 | FileCheck %s --check-prefix=NODIV_KRAIT -; RUN: llc < %s -mcpu=krait -mattr=-hwdiv,-hwdiv-arm | FileCheck %s --check-prefix=NODIV_KRAIT +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=krait -mattr=-hwdiv,-hwdiv-arm | FileCheck %s --check-prefix=NODIV_KRAIT ; check if correct instruction is emitted by integrated assembler ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=krait -filetype=obj | llvm-objdump -mcpu=krait -triple armv7-linux-gnueabi -d - | FileCheck %s --check-prefix=HWDIV @@ -28,8 +28,8 @@ entry: store i32 0, i32* %retval store volatile i32 100, i32* %b, align 4 store volatile i32 32, i32* %c, align 4 - %0 = load volatile i32* %b, align 4 - %1 = load volatile i32* %c, align 4 + %0 = load volatile i32, i32* %b, align 4 + %1 = load volatile i32, i32* %c, align 4 %div = sdiv i32 %0, %1 store volatile i32 %div, i32* %a, align 4 ret i32 0 |