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authorEvan Cheng <evan.cheng@apple.com>2009-10-16 06:11:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-10-16 06:11:08 +0000
commitd3dd50fec00fbbb76edbfaff4d613f1248d21c9e (patch)
tree4a579d2d893fbf28acc289b0c04e38b608288b45 /test/CodeGen/ARM/ldrd.ll
parentc83da2f9e389332b9cf8eae9d823f745be5624b8 (diff)
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Enable post-alloc scheduling for all ARM variants except for Thumb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84249 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/ldrd.ll')
-rw-r--r--test/CodeGen/ARM/ldrd.ll10
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/ARM/ldrd.ll b/test/CodeGen/ARM/ldrd.ll
index 8f7ae55..c366e2d 100644
--- a/test/CodeGen/ARM/ldrd.ll
+++ b/test/CodeGen/ARM/ldrd.ll
@@ -7,13 +7,13 @@
define i64 @t(i64 %a) nounwind readonly {
entry:
-;V6: ldrd r2, [r2]
+;V6: ldrd r2, [r2]
-;V5: ldr r3, [r2]
-;V5-NEXT: ldr r2, [r2, #+4]
+;V5: ldr r3, [r2]
+;V5: ldr r2, [r2, #+4]
-;EABI: ldr r3, [r2]
-;EABI-NEXT: ldr r2, [r2, #+4]
+;EABI: ldr r3, [r2]
+;EABI: ldr r2, [r2, #+4]
%0 = load i64** @b, align 4
%1 = load i64* %0, align 4