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author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/CodeGen/ARM/longMAC.ll | |
parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/CodeGen/ARM/longMAC.ll')
-rw-r--r-- | test/CodeGen/ARM/longMAC.ll | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/longMAC.ll b/test/CodeGen/ARM/longMAC.ll index fed6ec0..3f30fd4 100644 --- a/test/CodeGen/ARM/longMAC.ll +++ b/test/CodeGen/ARM/longMAC.ll @@ -75,3 +75,44 @@ define i64 @MACLongTest5(i64 %c, i32 %a, i32 %b) { %add = add i64 %mul, %c ret i64 %add } + +define i64 @MACLongTest6(i32 %a, i32 %b, i32 %c, i32 %d) { +;CHECK-LABEL: MACLongTest6: +;CHECK: smull r12, lr, r1, r0 +;CHECK: smlal r12, lr, r3, r2 + %conv = sext i32 %a to i64 + %conv1 = sext i32 %b to i64 + %mul = mul nsw i64 %conv1, %conv + %conv2 = sext i32 %c to i64 + %conv3 = sext i32 %d to i64 + %mul4 = mul nsw i64 %conv3, %conv2 + %add = add nsw i64 %mul4, %mul + ret i64 %add +} + +define i64 @MACLongTest7(i64 %acc, i32 %lhs, i32 %rhs) { +;CHECK-LABEL: MACLongTest7: +;CHECK-NOT: smlal + %conv = sext i32 %lhs to i64 + %conv1 = sext i32 %rhs to i64 + %mul = mul nsw i64 %conv1, %conv + %shl = shl i64 %mul, 32 + %shr = lshr i64 %mul, 32 + %or = or i64 %shl, %shr + %add = add i64 %or, %acc + ret i64 %add +} + +define i64 @MACLongTest8(i64 %acc, i32 %lhs, i32 %rhs) { +;CHECK-LABEL: MACLongTest8: +;CHECK-NOT: smlal + %conv = zext i32 %lhs to i64 + %conv1 = zext i32 %rhs to i64 + %mul = mul nuw i64 %conv1, %conv + %and = and i64 %mul, 4294967295 + %shl = shl i64 %mul, 32 + %or = or i64 %and, %shl + %add = add i64 %or, %acc + ret i64 %add +} + |