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authorEvan Cheng <evan.cheng@apple.com>2012-01-10 02:02:58 +0000
committerEvan Cheng <evan.cheng@apple.com>2012-01-10 02:02:58 +0000
commit97b5beb7fe7bb776654b04ae6c18af6ea15c74f7 (patch)
treeecf43bc095170286e1b89ca00a61e91a428d6449 /test/CodeGen/ARM/machine-cse-cmp.ll
parent64925c55c65f9345a69fb67db07aa62cfb723577 (diff)
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Allow machine-cse to look across MBB boundary when cse'ing instructions that
define physical registers. It's currently very restrictive, only catching cases where the CE is in an immediate (and only) predecessor. But it catches a surprising large number of cases. rdar://10660865 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147827 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/machine-cse-cmp.ll')
-rw-r--r--test/CodeGen/ARM/machine-cse-cmp.ll31
1 files changed, 30 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/machine-cse-cmp.ll b/test/CodeGen/ARM/machine-cse-cmp.ll
index c77402f..f566974 100644
--- a/test/CodeGen/ARM/machine-cse-cmp.ll
+++ b/test/CodeGen/ARM/machine-cse-cmp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s
;rdar://8003725
@G1 = external global i32
@@ -6,6 +6,7 @@
define i32 @f1(i32 %cond1, i32 %x1, i32 %x2, i32 %x3) {
entry:
+; CHECK: f1:
; CHECK: cmp
; CHECK: moveq
; CHECK-NOT: cmp
@@ -16,3 +17,31 @@ entry:
%tmp4 = add i32 %tmp2, %tmp3
ret i32 %tmp4
}
+
+@foo = external global i32
+@bar = external global [250 x i8], align 1
+
+; CSE of cmp across BB boundary
+; rdar://10660865
+define void @f2() nounwind ssp {
+entry:
+; CHECK: f2:
+; CHECK: cmp
+; CHECK: poplt
+; CHECK-NOT: cmp
+; CHECK: movle
+ %0 = load i32* @foo, align 4
+ %cmp28 = icmp sgt i32 %0, 0
+ br i1 %cmp28, label %for.body.lr.ph, label %for.cond1.preheader
+
+for.body.lr.ph: ; preds = %entry
+ %1 = icmp sgt i32 %0, 1
+ %smax = select i1 %1, i32 %0, i32 1
+ call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([250 x i8]* @bar, i32 0, i32 0), i8 0, i32 %smax, i32 1, i1 false)
+ unreachable
+
+for.cond1.preheader: ; preds = %entry
+ ret void
+}
+
+declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind