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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/ARM/neon_ld1.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/ARM/neon_ld1.ll')
| -rw-r--r-- | test/CodeGen/ARM/neon_ld1.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/neon_ld1.ll b/test/CodeGen/ARM/neon_ld1.ll index 9fd3fc5..f4d6019 100644 --- a/test/CodeGen/ARM/neon_ld1.ll +++ b/test/CodeGen/ARM/neon_ld1.ll @@ -7,8 +7,8 @@ ; CHECK: vstr d define void @t1(<2 x i32>* %r, <4 x i16>* %a, <4 x i16>* %b) nounwind { entry: - %0 = load <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1] - %1 = load <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1] + %0 = load <4 x i16>, <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1] + %1 = load <4 x i16>, <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1] %2 = add <4 x i16> %0, %1 ; <<4 x i16>> [#uses=1] %3 = bitcast <4 x i16> %2 to <2 x i32> ; <<2 x i32>> [#uses=1] store <2 x i32> %3, <2 x i32>* %r, align 8 @@ -22,8 +22,8 @@ entry: ; CHECK: vmov r0, r1, d define <2 x i32> @t2(<4 x i16>* %a, <4 x i16>* %b) nounwind readonly { entry: - %0 = load <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1] - %1 = load <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1] + %0 = load <4 x i16>, <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1] + %1 = load <4 x i16>, <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1] %2 = sub <4 x i16> %0, %1 ; <<4 x i16>> [#uses=1] %3 = bitcast <4 x i16> %2 to <2 x i32> ; <<2 x i32>> [#uses=1] ret <2 x i32> %3 |