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author | Evan Cheng <evan.cheng@apple.com> | 2010-10-06 06:27:31 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-06 06:27:31 +0000 |
commit | a0792de66c8364d47b0a688c7f408efb7b10f31b (patch) | |
tree | 74720b528520e7d3702afc6ed850dc6a6e1ce99e /test/CodeGen/ARM/select.ll | |
parent | 7f5124829ffcf75f598b024ec40cc83753eb72d4 (diff) | |
download | external_llvm-a0792de66c8364d47b0a688c7f408efb7b10f31b.zip external_llvm-a0792de66c8364d47b0a688c7f408efb7b10f31b.tar.gz external_llvm-a0792de66c8364d47b0a688c7f408efb7b10f31b.tar.bz2 |
- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling
itineraries isn't sufficient. e.g. variable_ops instructions such as
ARM::ldm.
This also allows target without scheduling itineraries to compute operand
latencies. e.g. X86 can return (approximated) latencies for high latency
instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
e.g. ldm and those used by store multiple instructions, e.g. stm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/select.ll')
-rw-r--r-- | test/CodeGen/ARM/select.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll index 7413bed..06b42f4 100644 --- a/test/CodeGen/ARM/select.ll +++ b/test/CodeGen/ARM/select.ll @@ -79,9 +79,9 @@ define double @f7(double %a, double %b) { ; CHECK-NEON: movw [[REGISTER_1:r[0-9]+]], #1123 ; CHECK-NEON-NEXT: movs [[REGISTER_2:r[0-9]+]], #0 ; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]] -; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], #LCPI ; CHECK-NEON-NEXT: it eq ; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4 +; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], #LCPI ; CHECK-NEON-NEXT: ldr ; CHECK-NEON: bx |