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| author | Owen Anderson <resistor@mac.com> | 2011-04-06 23:35:59 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-04-06 23:35:59 +0000 |
| commit | df298c9ea64eb335f63fc075d8ef6306682ffe75 (patch) | |
| tree | f018cf1b4a2cb10c1385cddb772fd995eff0c0ae /test/CodeGen/ARM/sub.ll | |
| parent | ef7fb17936ef38153e0a8c8146229d618722eb15 (diff) | |
| download | external_llvm-df298c9ea64eb335f63fc075d8ef6306682ffe75.zip external_llvm-df298c9ea64eb335f63fc075d8ef6306682ffe75.tar.gz external_llvm-df298c9ea64eb335f63fc075d8ef6306682ffe75.tar.bz2 | |
Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for folded comparisons, just like ADD and SUB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129038 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/sub.ll')
| -rw-r--r-- | test/CodeGen/ARM/sub.ll | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/sub.ll b/test/CodeGen/ARM/sub.ll index 7ada14d..555b18e 100644 --- a/test/CodeGen/ARM/sub.ll +++ b/test/CodeGen/ARM/sub.ll @@ -27,3 +27,12 @@ define i64 @f3(i64 %a) { ret i64 %tmp } +define i32 @f4(i32 %x) { +entry: +; CHECK: f4 +; CHECK: rsbs + %sub = sub i32 1, %x + %cmp = icmp ugt i32 %sub, 0 + %sel = select i1 %cmp, i32 1, i32 %sub + ret i32 %sel +} |