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author | Evan Cheng <evan.cheng@apple.com> | 2007-01-19 09:20:23 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-01-19 09:20:23 +0000 |
commit | 02b985c50faa7b0f43ef4100761c633ed4b8d6d2 (patch) | |
tree | 0d21bd626b6931c8fd248b5094331f5bb53f3b54 /test/CodeGen/ARM/uxtb.ll | |
parent | a8e2989ece6dc46df59b0768184028257f913843 (diff) | |
download | external_llvm-02b985c50faa7b0f43ef4100761c633ed4b8d6d2.zip external_llvm-02b985c50faa7b0f43ef4100761c633ed4b8d6d2.tar.gz external_llvm-02b985c50faa7b0f43ef4100761c633ed4b8d6d2.tar.bz2 |
ARM test cases contributed by Apple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33354 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/uxtb.ll')
-rw-r--r-- | test/CodeGen/ARM/uxtb.ll | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/uxtb.ll b/test/CodeGen/ARM/uxtb.ll new file mode 100644 index 0000000..fcd0a23 --- /dev/null +++ b/test/CodeGen/ARM/uxtb.ll @@ -0,0 +1,75 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | grep uxt | wc -l | grep 10 + +uint %test1(uint %x) { + %tmp1 = and uint %x, 16711935 ; <uint> [#uses=1] + ret uint %tmp1 +} + +uint %test2(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp2 +} + +uint %test3(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp2 +} + +uint %test4(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp6 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test5(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp2 +} + +uint %test6(uint %x) { + %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test7(uint %x) { + %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test8(uint %x) { + %tmp1 = shl uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711680 ; <uint> [#uses=1] + %tmp5 = shr uint %x, ubyte 24 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test9(uint %x) { + %tmp1 = shr uint %x, ubyte 24 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp5, %tmp1 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test10(uint %p0) { + %tmp1 = shr uint %p0, ubyte 7 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16253176 ; <uint> [#uses=2] + %tmp4 = shr uint %tmp2, ubyte 5 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 458759 ; <uint> [#uses=1] + %tmp7 = or uint %tmp5, %tmp2 ; <uint> [#uses=1] + ret uint %tmp7 +} + |