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| author | James Molloy <james.molloy@arm.com> | 2012-09-06 09:16:01 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2012-09-06 09:16:01 +0000 |
| commit | 6c822eea47dbef96940819b1ea085fabc49a1e71 (patch) | |
| tree | e9d2318a4f16d3ae149ba9e4f2794ba5f28c5f07 /test/CodeGen/ARM/vget_lane.ll | |
| parent | 7859f438e198fe441abef3d2c95c1cb9517f575b (diff) | |
| download | external_llvm-6c822eea47dbef96940819b1ea085fabc49a1e71.zip external_llvm-6c822eea47dbef96940819b1ea085fabc49a1e71.tar.gz external_llvm-6c822eea47dbef96940819b1ea085fabc49a1e71.tar.bz2 | |
Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163298 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vget_lane.ll')
| -rw-r--r-- | test/CodeGen/ARM/vget_lane.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/vget_lane.ll b/test/CodeGen/ARM/vget_lane.ll index 1fc885d..2ed65c9 100644 --- a/test/CodeGen/ARM/vget_lane.ll +++ b/test/CodeGen/ARM/vget_lane.ll @@ -200,7 +200,7 @@ define <8 x i16> @vsetQ_lane16(<8 x i16>* %A, i16 %B) nounwind { define <4 x i32> @vsetQ_lane32(<4 x i32>* %A, i32 %B) nounwind { ;CHECK: vsetQ_lane32: -;CHECK: vmov.32 +;CHECK: vmov s %tmp1 = load <4 x i32>* %A %tmp2 = insertelement <4 x i32> %tmp1, i32 %B, i32 1 ret <4 x i32> %tmp2 |