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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/ARM/vtrn.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/ARM/vtrn.ll')
-rw-r--r-- | test/CodeGen/ARM/vtrn.ll | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/test/CodeGen/ARM/vtrn.ll b/test/CodeGen/ARM/vtrn.ll index cdae7f8..caa5bec 100644 --- a/test/CodeGen/ARM/vtrn.ll +++ b/test/CodeGen/ARM/vtrn.ll @@ -4,8 +4,8 @@ define <8 x i8> @vtrni8(<8 x i8>* %A, <8 x i8>* %B) nounwind { ;CHECK-LABEL: vtrni8: ;CHECK: vtrn.8 ;CHECK-NEXT: vadd.i8 - %tmp1 = load <8 x i8>* %A - %tmp2 = load <8 x i8>* %B + %tmp1 = load <8 x i8>, <8 x i8>* %A + %tmp2 = load <8 x i8>, <8 x i8>* %B %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> %tmp5 = add <8 x i8> %tmp3, %tmp4 @@ -16,8 +16,8 @@ define <4 x i16> @vtrni16(<4 x i16>* %A, <4 x i16>* %B) nounwind { ;CHECK-LABEL: vtrni16: ;CHECK: vtrn.16 ;CHECK-NEXT: vadd.i16 - %tmp1 = load <4 x i16>* %A - %tmp2 = load <4 x i16>* %B + %tmp1 = load <4 x i16>, <4 x i16>* %A + %tmp2 = load <4 x i16>, <4 x i16>* %B %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6> %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7> %tmp5 = add <4 x i16> %tmp3, %tmp4 @@ -28,8 +28,8 @@ define <2 x i32> @vtrni32(<2 x i32>* %A, <2 x i32>* %B) nounwind { ;CHECK-LABEL: vtrni32: ;CHECK: vtrn.32 ;CHECK-NEXT: vadd.i32 - %tmp1 = load <2 x i32>* %A - %tmp2 = load <2 x i32>* %B + %tmp1 = load <2 x i32>, <2 x i32>* %A + %tmp2 = load <2 x i32>, <2 x i32>* %B %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> <i32 0, i32 2> %tmp4 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> <i32 1, i32 3> %tmp5 = add <2 x i32> %tmp3, %tmp4 @@ -40,8 +40,8 @@ define <2 x float> @vtrnf(<2 x float>* %A, <2 x float>* %B) nounwind { ;CHECK-LABEL: vtrnf: ;CHECK: vtrn.32 ;CHECK-NEXT: vadd.f32 - %tmp1 = load <2 x float>* %A - %tmp2 = load <2 x float>* %B + %tmp1 = load <2 x float>, <2 x float>* %A + %tmp2 = load <2 x float>, <2 x float>* %B %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <2 x i32> <i32 0, i32 2> %tmp4 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <2 x i32> <i32 1, i32 3> %tmp5 = fadd <2 x float> %tmp3, %tmp4 @@ -52,8 +52,8 @@ define <16 x i8> @vtrnQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind { ;CHECK-LABEL: vtrnQi8: ;CHECK: vtrn.8 ;CHECK-NEXT: vadd.i8 - %tmp1 = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp1 = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> %tmp4 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> %tmp5 = add <16 x i8> %tmp3, %tmp4 @@ -64,8 +64,8 @@ define <8 x i16> @vtrnQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind { ;CHECK-LABEL: vtrnQi16: ;CHECK: vtrn.16 ;CHECK-NEXT: vadd.i16 - %tmp1 = load <8 x i16>* %A - %tmp2 = load <8 x i16>* %B + %tmp1 = load <8 x i16>, <8 x i16>* %A + %tmp2 = load <8 x i16>, <8 x i16>* %B %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> %tmp5 = add <8 x i16> %tmp3, %tmp4 @@ -76,8 +76,8 @@ define <4 x i32> @vtrnQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind { ;CHECK-LABEL: vtrnQi32: ;CHECK: vtrn.32 ;CHECK-NEXT: vadd.i32 - %tmp1 = load <4 x i32>* %A - %tmp2 = load <4 x i32>* %B + %tmp1 = load <4 x i32>, <4 x i32>* %A + %tmp2 = load <4 x i32>, <4 x i32>* %B %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6> %tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7> %tmp5 = add <4 x i32> %tmp3, %tmp4 @@ -88,8 +88,8 @@ define <4 x float> @vtrnQf(<4 x float>* %A, <4 x float>* %B) nounwind { ;CHECK-LABEL: vtrnQf: ;CHECK: vtrn.32 ;CHECK-NEXT: vadd.f32 - %tmp1 = load <4 x float>* %A - %tmp2 = load <4 x float>* %B + %tmp1 = load <4 x float>, <4 x float>* %A + %tmp2 = load <4 x float>, <4 x float>* %B %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6> %tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7> %tmp5 = fadd <4 x float> %tmp3, %tmp4 @@ -102,8 +102,8 @@ define <8 x i8> @vtrni8_undef(<8 x i8>* %A, <8 x i8>* %B) nounwind { ;CHECK-LABEL: vtrni8_undef: ;CHECK: vtrn.8 ;CHECK-NEXT: vadd.i8 - %tmp1 = load <8 x i8>* %A - %tmp2 = load <8 x i8>* %B + %tmp1 = load <8 x i8>, <8 x i8>* %A + %tmp2 = load <8 x i8>, <8 x i8>* %B %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 undef, i32 2, i32 10, i32 undef, i32 12, i32 6, i32 14> %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 undef, i32 undef, i32 15> %tmp5 = add <8 x i8> %tmp3, %tmp4 @@ -114,8 +114,8 @@ define <8 x i16> @vtrnQi16_undef(<8 x i16>* %A, <8 x i16>* %B) nounwind { ;CHECK-LABEL: vtrnQi16_undef: ;CHECK: vtrn.16 ;CHECK-NEXT: vadd.i16 - %tmp1 = load <8 x i16>* %A - %tmp2 = load <8 x i16>* %B + %tmp1 = load <8 x i16>, <8 x i16>* %A + %tmp2 = load <8 x i16>, <8 x i16>* %B %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 6, i32 14> %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 undef, i32 3, i32 11, i32 5, i32 13, i32 undef, i32 undef> %tmp5 = add <8 x i16> %tmp3, %tmp4 |