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authorTilmann Scheller <tilmann.scheller@googlemail.com>2013-09-02 17:09:01 +0000
committerTilmann Scheller <tilmann.scheller@googlemail.com>2013-09-02 17:09:01 +0000
commit195dd8a1ce38970e3463ee1425647280373b60a7 (patch)
tree0afe7752d21cdce79298c346f6620337dfd2f86a /test/CodeGen/ARM
parent5bed440eb13b4104b64fa9c557954f335aac2aab (diff)
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ARM: Default to the Swift CPU when targeting armv7s/thumbv7s.
Test cases adjusted accordingly. This fixes rdar://14871821. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189766 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r--test/CodeGen/ARM/dagcombine-concatvector.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/dagcombine-concatvector.ll b/test/CodeGen/ARM/dagcombine-concatvector.ll
index d8c6c64..2927ea2 100644
--- a/test/CodeGen/ARM/dagcombine-concatvector.ll
+++ b/test/CodeGen/ARM/dagcombine-concatvector.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7s-apple-ios3.0.0 | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7s-apple-ios3.0.0 -mcpu=generic | FileCheck %s
; PR15525
; CHECK-LABEL: test1: