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authorEvan Cheng <evan.cheng@apple.com>2010-05-18 21:31:17 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-18 21:31:17 +0000
commit28dad2a5caccf579f7430acd3af8fa6e6f8b575e (patch)
tree8056974c55bb6c857ba84db6a3347c263b89a436 /test/CodeGen/ARM
parent011c3f110bca748db66e437924f936a62f1969bf (diff)
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Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r--test/CodeGen/ARM/2010-05-18-PostIndexBug.ll25
1 files changed, 25 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll b/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll
new file mode 100644
index 0000000..9907228
--- /dev/null
+++ b/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s -check-prefix=ARM
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB
+; rdar://7998649
+
+%struct.foo = type { i64, i64 }
+
+define arm_apcscc zeroext i8 @t(%struct.foo* %this) noreturn optsize {
+entry:
+; ARM: t:
+; ARM: str r0, [r1], r0
+
+; THUMB: t:
+; THUMB-NOT: str r0, [r1], r0
+; THUMB: str r0, [r1]
+ %0 = getelementptr inbounds %struct.foo* %this, i32 0, i32 1 ; <i64*> [#uses=1]
+ store i32 undef, i32* inttoptr (i32 8 to i32*), align 8
+ br i1 undef, label %bb.nph96, label %bb3
+
+bb3: ; preds = %entry
+ %1 = load i64* %0, align 4 ; <i64> [#uses=0]
+ unreachable
+
+bb.nph96: ; preds = %entry
+ unreachable
+}