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authorManman Ren <mren@apple.com>2012-05-10 16:48:21 +0000
committerManman Ren <mren@apple.com>2012-05-10 16:48:21 +0000
commit8ae4f062e4aefe60732b3fc135769aaedddf082d (patch)
tree662271e4a9b9fce2b9fc6841b505ce6c3543e1a7 /test/CodeGen/ARM
parent9df72a93ef27a27c6853eed3ed92c9e0b62c9ca6 (diff)
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ARM: peephole optimization to remove cmp instruction
This patch will optimize the following cases: sub r1, r3 | sub r1, imm cmp r3, r1 or cmp r1, r3 | cmp r1, imm bge L1 TO subs r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can replace "sub" with "subs" and eliminate the "cmp" instruction. rdar: 10734411 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156550 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r--test/CodeGen/ARM/sub-cmp-peephole.ll34
1 files changed, 34 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/sub-cmp-peephole.ll b/test/CodeGen/ARM/sub-cmp-peephole.ll
new file mode 100644
index 0000000..b3a9dc5
--- /dev/null
+++ b/test/CodeGen/ARM/sub-cmp-peephole.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i32 @f(i32 %a, i32 %b) nounwind ssp {
+entry:
+; CHECK: _f:
+; CHECK: subs
+; CHECK-NOT: cmp
+ %cmp = icmp sgt i32 %a, %b
+ %sub = sub nsw i32 %a, %b
+ %sub. = select i1 %cmp, i32 %sub, i32 0
+ ret i32 %sub.
+}
+
+define i32 @g(i32 %a, i32 %b) nounwind ssp {
+entry:
+; CHECK: _g:
+; CHECK: subs
+; CHECK-NOT: cmp
+ %cmp = icmp slt i32 %a, %b
+ %sub = sub nsw i32 %b, %a
+ %sub. = select i1 %cmp, i32 %sub, i32 0
+ ret i32 %sub.
+}
+
+define i32 @h(i32 %a, i32 %b) nounwind ssp {
+entry:
+; CHECK: _h:
+; CHECK: subs
+; CHECK-NOT: cmp
+ %cmp = icmp sgt i32 %a, 3
+ %sub = sub nsw i32 %a, 3
+ %sub. = select i1 %cmp, i32 %sub, i32 %b
+ ret i32 %sub.
+}