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| author | Evan Cheng <evan.cheng@apple.com> | 2009-06-05 19:08:58 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-05 19:08:58 +0000 |
| commit | 925492279ae7d93180ebdd689c87cd58522e68f5 (patch) | |
| tree | 301cdfece790b9f60bfa685dcc89ec13ff1c107a /test/CodeGen/ARM | |
| parent | 6a784894b1e9c85ff52790adc3880a3a7a1a4ea3 (diff) | |
| download | external_llvm-925492279ae7d93180ebdd689c87cd58522e68f5.zip external_llvm-925492279ae7d93180ebdd689c87cd58522e68f5.tar.gz external_llvm-925492279ae7d93180ebdd689c87cd58522e68f5.tar.bz2 | |
Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72955 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
| -rw-r--r-- | test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/lsr-scale-addr-mode.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/memcpy-inline.ll | 6 |
3 files changed, 4 insertions, 6 deletions
diff --git a/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll b/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll index 7b7ea6b..3f17a51 100644 --- a/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll +++ b/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 184 +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 164 %"struct.Adv5::Ekin<3>" = type <{ i8 }> %"struct.Adv5::X::Energyflux<3>" = type { double } diff --git a/test/CodeGen/ARM/lsr-scale-addr-mode.ll b/test/CodeGen/ARM/lsr-scale-addr-mode.ll index 6db0d43..02902f2 100644 --- a/test/CodeGen/ARM/lsr-scale-addr-mode.ll +++ b/test/CodeGen/ARM/lsr-scale-addr-mode.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=arm | grep -F {str r2, \[r0, +r3, lsl #2\]} +; RUN: llvm-as < %s | llc -march=arm | grep lsl | grep -F {lsl #2\]} ; Should use scaled addressing mode. define void @sintzero(i32* %a) nounwind { diff --git a/test/CodeGen/ARM/memcpy-inline.ll b/test/CodeGen/ARM/memcpy-inline.ll index 5d1beea..4bf0b4f 100644 --- a/test/CodeGen/ARM/memcpy-inline.ll +++ b/test/CodeGen/ARM/memcpy-inline.ll @@ -1,9 +1,7 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldmia +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep stmia ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrb ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrh -; This used to look for ldmia. But it's no longer lucky enough to -; have the load / store instructions lined up just right after -; scheduler change for pr3457. We'll look for a robust solution -; later. %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } @src = external global %struct.x |