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author | Joey Gouly <joey.gouly@arm.com> | 2013-07-17 14:03:49 +0000 |
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committer | Joey Gouly <joey.gouly@arm.com> | 2013-07-17 14:03:49 +0000 |
commit | c88ac4a344bdb5b3ade5c24d67e1227c4d3a8978 (patch) | |
tree | b431fc6ee27c6595da86b616f89c9402577374fb /test/CodeGen/ARM | |
parent | 19c14abf1c4ccebfa7d07bdd6ea8462a15c0b749 (diff) | |
download | external_llvm-c88ac4a344bdb5b3ade5c24d67e1227c4d3a8978.zip external_llvm-c88ac4a344bdb5b3ade5c24d67e1227c4d3a8978.tar.gz external_llvm-c88ac4a344bdb5b3ade5c24d67e1227c4d3a8978.tar.bz2 |
Add the tests that I forgot to 'svn add' with my previous commit (r186504).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186506 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r-- | test/CodeGen/ARM/vminmaxnm.ll | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/vminmaxnm.ll b/test/CodeGen/ARM/vminmaxnm.ll new file mode 100644 index 0000000..afa73b9 --- /dev/null +++ b/test/CodeGen/ARM/vminmaxnm.ll @@ -0,0 +1,42 @@ +; RUN: llc < %s -mtriple armv8 -mattr=+neon | FileCheck %s + +define <4 x float> @vmaxnmq(<4 x float>* %A, <4 x float>* %B) nounwind { +; CHECK: vmaxnmq +; CHECK: vmaxnm.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} + %tmp1 = load <4 x float>* %A + %tmp2 = load <4 x float>* %B + %tmp3 = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) + ret <4 x float> %tmp3 +} + +define <2 x float> @vmaxnmd(<2 x float>* %A, <2 x float>* %B) nounwind { +; CHECK: vmaxnmd +; CHECK: vmaxnm.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} + %tmp1 = load <2 x float>* %A + %tmp2 = load <2 x float>* %B + %tmp3 = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) + ret <2 x float> %tmp3 +} + +define <4 x float> @vminnmq(<4 x float>* %A, <4 x float>* %B) nounwind { +; CHECK: vminnmq +; CHECK: vminnm.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} + %tmp1 = load <4 x float>* %A + %tmp2 = load <4 x float>* %B + %tmp3 = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) + ret <4 x float> %tmp3 +} + +define <2 x float> @vminnmd(<2 x float>* %A, <2 x float>* %B) nounwind { +; CHECK: vminnmd +; CHECK: vminnm.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} + %tmp1 = load <2 x float>* %A + %tmp2 = load <2 x float>* %B + %tmp3 = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) + ret <2 x float> %tmp3 +} + +declare <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone +declare <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone +declare <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone +declare <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone |