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author | Matthias Braun <matze@braunis.de> | 2013-10-04 16:52:56 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2013-10-04 16:52:56 +0000 |
commit | d1bd8d904c5adbe14f700be02f1e6479b5a6d04b (patch) | |
tree | 193bfea1c22a4876c6572a7e79301440a0b9927c /test/CodeGen/ARM | |
parent | 4e54f41d6ce6b5a502d2f8496f1e8360ed953b7d (diff) | |
download | external_llvm-d1bd8d904c5adbe14f700be02f1e6479b5a6d04b.zip external_llvm-d1bd8d904c5adbe14f700be02f1e6479b5a6d04b.tar.gz external_llvm-d1bd8d904c5adbe14f700be02f1e6479b5a6d04b.tar.bz2 |
ARM: optimizeSelect has to consider the previous register class
optimizeSelect folds (predicated) copy instructions, it must not ignore
the original register class of the operand when replacing the register
with the copies dest register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191963 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r-- | test/CodeGen/ARM/optselect-regclass.ll | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/optselect-regclass.ll b/test/CodeGen/ARM/optselect-regclass.ll new file mode 100644 index 0000000..1aa4520 --- /dev/null +++ b/test/CodeGen/ARM/optselect-regclass.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -march=arm -mcpu=swift -verify-machineinstrs +%union.opcode.0.2.5.8.15.28 = type { i32 } + +@opcode = external global %union.opcode.0.2.5.8.15.28, align 4 +@operands = external hidden global [50 x i8], align 4 +@.str86 = external hidden unnamed_addr constant [13 x i8], align 1 + +; Function Attrs: nounwind ssp +define void @xfr() { +entry: + %bf.load4 = load i32* getelementptr inbounds (%union.opcode.0.2.5.8.15.28* @opcode, i32 0, i32 0), align 4 + %bf.clear10 = and i32 %bf.load4, 65535 + %and11 = and i32 %bf.load4, 32768 + %tobool12 = icmp ne i32 %and11, 0 + %cond13 = select i1 %tobool12, i32 1073676288, i32 0 + %or = or i32 %cond13, %bf.clear10 + %shl = shl nuw i32 %or, 2 + %add = add i32 0, %shl + tail call void (i8*, i32, i32, i8*, ...)* @__sprintf_chk(i8* getelementptr inbounds ([50 x i8]* @operands, i32 0, i32 0), i32 0, i32 50, i8* getelementptr inbounds ([13 x i8]* @.str86, i32 0, i32 0), i32 undef, i32 undef, i32 %add) + ret void +} + +declare void @__sprintf_chk(i8*, i32, i32, i8*, ...) |