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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-30 01:37:52 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-30 01:37:52 +0000 |
commit | d5b679c8cea8cd0daa6b7588102b5d07ae5bba50 (patch) | |
tree | c8c8e286a8f75935c0581ab08d23bd79962be426 /test/CodeGen/ARM | |
parent | d65ba721cccb0d0998750908bf2533e08b106f38 (diff) | |
download | external_llvm-d5b679c8cea8cd0daa6b7588102b5d07ae5bba50.zip external_llvm-d5b679c8cea8cd0daa6b7588102b5d07ae5bba50.tar.gz external_llvm-d5b679c8cea8cd0daa6b7588102b5d07ae5bba50.tar.bz2 |
Weekly fix of register allocation dependent unit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r-- | test/CodeGen/ARM/arm-and-tst-peephole.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/indirectbr.ll | 19 | ||||
-rw-r--r-- | test/CodeGen/ARM/ldrd.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/lsr-code-insertion.ll | 8 | ||||
-rw-r--r-- | test/CodeGen/ARM/unaligned_load_store.ll | 16 |
5 files changed, 29 insertions, 22 deletions
diff --git a/test/CodeGen/ARM/arm-and-tst-peephole.ll b/test/CodeGen/ARM/arm-and-tst-peephole.ll index 444dce7..0762070 100644 --- a/test/CodeGen/ARM/arm-and-tst-peephole.ll +++ b/test/CodeGen/ARM/arm-and-tst-peephole.ll @@ -23,7 +23,7 @@ tailrecurse: ; preds = %sw.bb, %entry %tmp2 = load i8** %scevgep5 %0 = ptrtoint i8* %tmp2 to i32 -; ARM: ands r12, r12, #3 +; ARM: ands {{r[0-9]+}}, {{r[0-9]+}}, #3 ; ARM-NEXT: beq ; THUMB: movs r[[R0:[0-9]+]], #3 @@ -31,7 +31,7 @@ tailrecurse: ; preds = %sw.bb, %entry ; THUMB-NEXT: cmp r[[R0]], #0 ; THUMB-NEXT: beq -; T2: ands r12, r12, #3 +; T2: ands {{r[0-9]+}}, {{r[0-9]+}}, #3 ; T2-NEXT: beq %and = and i32 %0, 3 diff --git a/test/CodeGen/ARM/indirectbr.ll b/test/CodeGen/ARM/indirectbr.ll index 19dad3a..f0ab9dd 100644 --- a/test/CodeGen/ARM/indirectbr.ll +++ b/test/CodeGen/ARM/indirectbr.ll @@ -42,20 +42,23 @@ L3: ; preds = %L4, %bb2 br label %L2 L2: ; preds = %L3, %bb2 +; THUMB: muls %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1] %phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1] br label %L1 L1: ; preds = %L2, %bb2 %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1] -; ARM: ldr r1, LCPI -; ARM: add r1, pc, r1 -; ARM: str r1 -; THUMB: ldr.n r2, LCPI -; THUMB: add r2, pc -; THUMB: str r2 -; THUMB2: ldr.n r2, LCPI -; THUMB2-NEXT: str r2 +; ARM: ldr [[R1:r[0-9]+]], LCPI +; ARM: add [[R1b:r[0-9]+]], pc, [[R1]] +; ARM: str [[R1b]] +; THUMB: ldr.n +; THUMB: add +; THUMB: ldr.n [[R2:r[0-9]+]], LCPI +; THUMB: add [[R2]], pc +; THUMB: str [[R2]] +; THUMB2: ldr.n [[R2:r[0-9]+]], LCPI +; THUMB2-NEXT: str{{(.w)?}} [[R2]] store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4 ret i32 %res.3 } diff --git a/test/CodeGen/ARM/ldrd.ll b/test/CodeGen/ARM/ldrd.ll index 3856944..8010f20 100644 --- a/test/CodeGen/ARM/ldrd.ll +++ b/test/CodeGen/ARM/ldrd.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=armv6-apple-darwin -regalloc=linearscan | FileCheck %s -check-prefix=V6 -; RUN: llc < %s -mtriple=armv5-apple-darwin | FileCheck %s -check-prefix=V5 -; RUN: llc < %s -mtriple=armv6-eabi | FileCheck %s -check-prefix=EABI +; RUN: llc < %s -mtriple=armv5-apple-darwin -regalloc=linearscan | FileCheck %s -check-prefix=V5 +; RUN: llc < %s -mtriple=armv6-eabi -regalloc=linearscan | FileCheck %s -check-prefix=EABI ; rdar://r6949835 ; Magic ARM pair hints works best with linearscan. diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll index 1bbb96d..153fd8f 100644 --- a/test/CodeGen/ARM/lsr-code-insertion.ll +++ b/test/CodeGen/ARM/lsr-code-insertion.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -stats |& grep {39.*Number of machine instrs printed} -; RUN: llc < %s -stats |& not grep {.*Number of re-materialization} +; RUN: llc < %s | FileCheck %s ; This test really wants to check that the resultant "cond_true" block only ; has a single store in it, and that cond_true55 only has code to materialize ; the constant and do a store. We do *not* want something like this: @@ -8,6 +7,11 @@ ; add r8, r0, r6 ; str r10, [r8, #+4] ; +; CHECK: ldr [[R6:r[0-9*]+]], LCP +; CHECK: cmp {{.*}}, [[R6]] +; CHECK: ldrle +; CHECK-NEXT: strle + target triple = "arm-apple-darwin8" define void @foo(i32* %mc, i32* %mpp, i32* %ip, i32* %dpp, i32* %tpmm, i32 %M, i32* %tpim, i32* %tpdm, i32* %bp, i32* %ms, i32 %xmb) { diff --git a/test/CodeGen/ARM/unaligned_load_store.ll b/test/CodeGen/ARM/unaligned_load_store.ll index b42e11f..a8237c6 100644 --- a/test/CodeGen/ARM/unaligned_load_store.ll +++ b/test/CodeGen/ARM/unaligned_load_store.ll @@ -8,14 +8,14 @@ define void @t(i8* nocapture %a, i8* nocapture %b) nounwind { entry: ; GENERIC: t: -; GENERIC: ldrb r2 -; GENERIC: ldrb r3 -; GENERIC: ldrb r12 -; GENERIC: ldrb r1 -; GENERIC: strb r1 -; GENERIC: strb r12 -; GENERIC: strb r3 -; GENERIC: strb r2 +; GENERIC: ldrb [[R2:r[0-9]+]] +; GENERIC: ldrb [[R3:r[0-9]+]] +; GENERIC: ldrb [[R12:r[0-9]+]] +; GENERIC: ldrb [[R1:r[0-9]+]] +; GENERIC: strb [[R1]] +; GENERIC: strb [[R12]] +; GENERIC: strb [[R3]] +; GENERIC: strb [[R2]] ; DARWIN_V6: t: ; DARWIN_V6: ldr r1 |