diff options
| author | Cameron Zwarich <zwarich@apple.com> | 2011-10-05 23:38:50 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-10-05 23:38:50 +0000 |
| commit | d78ebe1e12a9aae01cb11d4d10a3d0600407e5ca (patch) | |
| tree | 00ae7f126fe7d16a9198b6921fef433bbb7e3e47 /test/CodeGen/ARM | |
| parent | 5cbef19a1d9860534a573f446970f5c65758fb66 (diff) | |
| download | external_llvm-d78ebe1e12a9aae01cb11d4d10a3d0600407e5ca.zip external_llvm-d78ebe1e12a9aae01cb11d4d10a3d0600407e5ca.tar.gz external_llvm-d78ebe1e12a9aae01cb11d4d10a3d0600407e5ca.tar.bz2 | |
Remove a check from ARM shifted operand isel helper methods, which were blocking
merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141247 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
| -rw-r--r-- | test/CodeGen/ARM/shifter_operand.ll | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll index f0e2d10..964cef0 100644 --- a/test/CodeGen/ARM/shifter_operand.ll +++ b/test/CodeGen/ARM/shifter_operand.ll @@ -54,13 +54,12 @@ declare i8* @malloc(...) define fastcc void @test4(i16 %addr) nounwind { entry: ; A8: test4: -; A8: ldr r2, [r0, r1, lsl #2] -; A8: str r2, [r0, r1, lsl #2] +; A8: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2] +; A8: str [[REG]], [r0, r1, lsl #2] ; A9: test4: -; A9: add r0, r0, r{{[0-9]+}}, lsl #2 -; A9: ldr r1, [r0] -; A9: str r1, [r0] +; A9: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2] +; A9: str [[REG]], [r0, r1, lsl #2] %0 = tail call i8* (...)* @malloc(i32 undef) nounwind %1 = bitcast i8* %0 to i32* %2 = sext i16 %addr to i32 |