diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-28 21:38:51 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-28 21:38:51 +0000 |
| commit | f6c690019b7ba9d121e658d16b9d99831df7428f (patch) | |
| tree | 9a2fa1cfed5dbbd1f600c3e2518dc7d6381f343f /test/CodeGen/ARM | |
| parent | 43afb6ff1cf7b040e2d70abb47679e1357a329d5 (diff) | |
| download | external_llvm-f6c690019b7ba9d121e658d16b9d99831df7428f.zip external_llvm-f6c690019b7ba9d121e658d16b9d99831df7428f.tar.gz external_llvm-f6c690019b7ba9d121e658d16b9d99831df7428f.tar.bz2 | |
Handle REG_SEQUENCE with implicitly defined operands.
Code like that would only be produced by bugpoint, but we should still
handle it correctly.
When a register is defined by a REG_SEQUENCE of undefs, the register
itself is undef. Previously, we would create a register with uses but no
defs.
Fixes part of PR10520.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136401 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
| -rw-r--r-- | test/CodeGen/ARM/crash.ll | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/crash.ll b/test/CodeGen/ARM/crash.ll index 4b6876d..5ecfe15 100644 --- a/test/CodeGen/ARM/crash.ll +++ b/test/CodeGen/ARM/crash.ll @@ -27,3 +27,24 @@ bb3: exit: ret void } + +; PR10520 - REG_SEQUENCE with implicit-def operands. +define arm_aapcs_vfpcc void @foo() nounwind align 2 { +bb: + %tmp = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> <i32 1> + %tmp8 = bitcast <1 x i64> %tmp to <2 x float> + %tmp9 = shufflevector <2 x float> %tmp8, <2 x float> %tmp8, <4 x i32> <i32 1, i32 1, i32 1, i32 1> + %tmp10 = fmul <4 x float> undef, %tmp9 + %tmp11 = fadd <4 x float> %tmp10, undef + %tmp12 = fadd <4 x float> undef, %tmp11 + %tmp13 = bitcast <4 x float> %tmp12 to i128 + %tmp14 = bitcast i128 %tmp13 to <4 x float> + %tmp15 = bitcast <4 x float> %tmp14 to i128 + %tmp16 = bitcast i128 %tmp15 to <4 x float> + %tmp17 = bitcast <4 x float> %tmp16 to i128 + %tmp18 = bitcast i128 %tmp17 to <4 x float> + %tmp19 = bitcast <4 x float> %tmp18 to i128 + %tmp20 = bitcast i128 %tmp19 to <4 x float> + store <4 x float> %tmp20, <4 x float>* undef, align 16 + ret void +} |