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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-02 17:39:17 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-02 17:39:17 +0000 |
| commit | 63cc527fbce3d1e4b47b687c404b1777fa15ffe5 (patch) | |
| tree | 0cd6b5fa5f13421e7b72aff823868b7c7a2072a6 /test/CodeGen/Blackfin | |
| parent | 73b7bb7b07fdf63f699698d4027dd981fd46ce80 (diff) | |
| download | external_llvm-63cc527fbce3d1e4b47b687c404b1777fa15ffe5.zip external_llvm-63cc527fbce3d1e4b47b687c404b1777fa15ffe5.tar.gz external_llvm-63cc527fbce3d1e4b47b687c404b1777fa15ffe5.tar.bz2 | |
Inline assembly support for Blackfin.
We use the same constraints as GCC, including those that are slightly insane for inline assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77899 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Blackfin')
| -rw-r--r-- | test/CodeGen/Blackfin/inline-asm.ll | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/test/CodeGen/Blackfin/inline-asm.ll b/test/CodeGen/Blackfin/inline-asm.ll new file mode 100644 index 0000000..ee8fbb0 --- /dev/null +++ b/test/CodeGen/Blackfin/inline-asm.ll @@ -0,0 +1,38 @@ +; RUN: llvm-as < %s | llc -march=bfin | FileCheck %s + +; Standard "r" +; CHECK: r0 = r0 + r1; +define i32 @add_r(i32 %A, i32 %B) { + %R = call i32 asm "$0 = $1 + $2;", "=r,r,r"( i32 %A, i32 %B ) nounwind + ret i32 %R +} + +; Target "d" +; CHECK: r0 = r0 - r1; +define i32 @add_d(i32 %A, i32 %B) { + %R = call i32 asm "$0 = $1 - $2;", "=d,d,d"( i32 %A, i32 %B ) nounwind + ret i32 %R +} + +; Target "a" for P-regs +; CHECK: p0 = (p0 + p1) << 1; +define i32 @add_a(i32 %A, i32 %B) { + %R = call i32 asm "$0 = ($1 + $2) << 1;", "=a,a,a"( i32 %A, i32 %B ) nounwind + ret i32 %R +} + +; Target "z" for P0, P1, P2. This is not a real regclass +; CHECK: p0 = (p0 + p1) << 2; +define i32 @add_Z(i32 %A, i32 %B) { + %R = call i32 asm "$0 = ($1 + $2) << 2;", "=z,z,z"( i32 %A, i32 %B ) nounwind + ret i32 %R +} + +; Target "C" for CC. This is a single register +; CHECK: cc = p0 < p1; +; CHECK: r0 = cc; +define i32 @add_C(i32 %A, i32 %B) { + %R = call i32 asm "$0 = $1 < $2;", "=C,z,z"( i32 %A, i32 %B ) nounwind + ret i32 %R +} + |