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authorJyotsna Verma <jverma@codeaurora.org>2013-03-28 16:25:57 +0000
committerJyotsna Verma <jverma@codeaurora.org>2013-03-28 16:25:57 +0000
commit4f2ef94d6ad77cbdef068e85674d0101d331051e (patch)
treed9abe7ff26d1ecdaed6111b7b39978b1327733b3 /test/CodeGen/Hexagon
parentaab230545459fea4204d7e8a82e93109ebaa880f (diff)
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Hexagon: Use multiclass for gp-relative instructions.
Remove noV4T gp-relative instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178246 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
-rw-r--r--test/CodeGen/Hexagon/gp-rel.ll33
1 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/gp-rel.ll b/test/CodeGen/Hexagon/gp-rel.ll
new file mode 100644
index 0000000..561869e
--- /dev/null
+++ b/test/CodeGen/Hexagon/gp-rel.ll
@@ -0,0 +1,33 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; Check that gp-relative instructions are being generated.
+
+@a = common global i32 0, align 4
+@b = common global i32 0, align 4
+@c = common global i32 0, align 4
+
+define i32 @foo(i32 %p) #0 {
+entry:
+; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(#a)
+; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(#b)
+; CHECK: if{{ *}}(p{{[0-3]}}) memw(##c){{ *}}={{ *}}r{{[0-9]+}}
+ %0 = load i32* @a, align 4
+ %1 = load i32* @b, align 4
+ %add = add nsw i32 %1, %0
+ %cmp = icmp eq i32 %0, %1
+ br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
+
+entry.if.end_crit_edge:
+ %.pre = load i32* @c, align 4
+ br label %if.end
+
+if.then:
+ %add1 = add nsw i32 %add, %0
+ store i32 %add1, i32* @c, align 4
+ br label %if.end
+
+if.end:
+ %2 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %add1, %if.then ]
+ %cmp2 = icmp eq i32 %add, %2
+ %sel1 = select i1 %cmp2, i32 %2, i32 %1
+ ret i32 %sel1
+}