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author | Jyotsna Verma <jverma@codeaurora.org> | 2013-05-09 18:25:44 +0000 |
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committer | Jyotsna Verma <jverma@codeaurora.org> | 2013-05-09 18:25:44 +0000 |
commit | f4f60b10e4ccd14511f5c83f4e83dbcad6740f63 (patch) | |
tree | 0745e385af3efcac9794d277701934d6a143d6e3 /test/CodeGen/Hexagon | |
parent | 1f4b796b49d13075531ed43b35824ecc9d757467 (diff) | |
download | external_llvm-f4f60b10e4ccd14511f5c83f4e83dbcad6740f63.zip external_llvm-f4f60b10e4ccd14511f5c83f4e83dbcad6740f63.tar.gz external_llvm-f4f60b10e4ccd14511f5c83f4e83dbcad6740f63.tar.bz2 |
Hexagon: Use relation map for getMatchingCondBranchOpcode() and
getInvertedPredicatedOpcode() functions instead of switch cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
-rw-r--r-- | test/CodeGen/Hexagon/pred-instrs.ll | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/pred-instrs.ll b/test/CodeGen/Hexagon/pred-instrs.ll new file mode 100644 index 0000000..800073e --- /dev/null +++ b/test/CodeGen/Hexagon/pred-instrs.ll @@ -0,0 +1,30 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; Check that we are able to predicate instructions. + +; CHECK: if{{ *}}({{!*}}p{{[0-3]}}{{[.new]*}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}{{and|aslh}} +; CHECK: if{{ *}}({{!*}}p{{[0-3]}}{{[.new]*}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}{{and|aslh}} +@a = external global i32 +@d = external global i32 + +; Function Attrs: nounwind +define i32 @test1(i8 zeroext %la, i8 zeroext %lb) { +entry: + %cmp = icmp eq i8 %la, %lb + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + %conv1 = zext i8 %la to i32 + %shl = shl nuw nsw i32 %conv1, 16 + br label %if.end + +if.else: ; preds = %entry + %and8 = and i8 %lb, %la + %and = zext i8 %and8 to i32 + br label %if.end + +if.end: ; preds = %if.else, %if.then + %storemerge = phi i32 [ %and, %if.else ], [ %shl, %if.then ] + store i32 %storemerge, i32* @a, align 4 + %0 = load i32* @d, align 4 + ret i32 %0 +} |