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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/MSP430/Inst16rm.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/MSP430/Inst16rm.ll')
| -rw-r--r-- | test/CodeGen/MSP430/Inst16rm.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/MSP430/Inst16rm.ll b/test/CodeGen/MSP430/Inst16rm.ll index e6c5261..4f6998e 100644 --- a/test/CodeGen/MSP430/Inst16rm.ll +++ b/test/CodeGen/MSP430/Inst16rm.ll @@ -6,7 +6,7 @@ target triple = "msp430-generic-generic" define i16 @add(i16 %a) nounwind { ; CHECK-LABEL: add: ; CHECK: add.w &foo, r15 - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = add i16 %a, %1 ret i16 %2 } @@ -14,7 +14,7 @@ define i16 @add(i16 %a) nounwind { define i16 @and(i16 %a) nounwind { ; CHECK-LABEL: and: ; CHECK: and.w &foo, r15 - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = and i16 %a, %1 ret i16 %2 } @@ -22,7 +22,7 @@ define i16 @and(i16 %a) nounwind { define i16 @bis(i16 %a) nounwind { ; CHECK-LABEL: bis: ; CHECK: bis.w &foo, r15 - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = or i16 %a, %1 ret i16 %2 } @@ -30,7 +30,7 @@ define i16 @bis(i16 %a) nounwind { define i16 @bic(i16 %a) nounwind { ; CHECK-LABEL: bic: ; CHECK: bic.w &foo, r15 - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = xor i16 %1, -1 %3 = and i16 %a, %2 ret i16 %3 @@ -39,7 +39,7 @@ define i16 @bic(i16 %a) nounwind { define i16 @xor(i16 %a) nounwind { ; CHECK-LABEL: xor: ; CHECK: xor.w &foo, r15 - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = xor i16 %a, %1 ret i16 %2 } |