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| author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
| commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
| tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/CodeGen/Mips/atomic.ll | |
| parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
| parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
| download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 | |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/CodeGen/Mips/atomic.ll')
| -rw-r--r-- | test/CodeGen/Mips/atomic.ll | 53 |
1 files changed, 33 insertions, 20 deletions
diff --git a/test/CodeGen/Mips/atomic.ll b/test/CodeGen/Mips/atomic.ll index 78fd829..ccfeb00 100644 --- a/test/CodeGen/Mips/atomic.ll +++ b/test/CodeGen/Mips/atomic.ll @@ -1,14 +1,15 @@ -; RUN: llc -march=mipsel --disable-machine-licm -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EL -; RUN: llc -march=mipsel --disable-machine-licm -mcpu=mips32r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -; RUN: llc -march=mipsel --disable-machine-licm -mcpu=mips32r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips4 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EL -; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EL -; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips64r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips64r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL +; RUN: llc -march=mipsel --disable-machine-licm -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EL -check-prefix=NOT-MICROMIPS +; RUN: llc -march=mipsel --disable-machine-licm -mcpu=mips32r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -check-prefix=NOT-MICROMIPS +; RUN: llc -march=mipsel --disable-machine-licm -mcpu=mips32r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -check-prefix=NOT-MICROMIPS +; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips4 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EL -check-prefix=NOT-MICROMIPS +; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EL -check-prefix=NOT-MICROMIPS +; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips64r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -check-prefix=NOT-MICROMIPS +; RUN: llc -march=mips64el --disable-machine-licm -mcpu=mips64r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -check-prefix=NOT-MICROMIPS +; RUN: llc -march=mipsel --disable-machine-licm -mcpu=mips32r2 -mattr=micromips < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=HAS-SEB-SEH -check-prefix=CHECK-EL -check-prefix=MICROMIPS ; Keep one big-endian check so that we don't reduce testing, but don't add more ; since endianness doesn't affect the body of the atomic operations. -; RUN: llc -march=mips --disable-machine-licm -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EB +; RUN: llc -march=mips --disable-machine-licm -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=MIPS32-ANY -check-prefix=NO-SEB-SEH -check-prefix=CHECK-EB -check-prefix=NOT-MICROMIPS @x = common global i32 0, align 4 @@ -26,7 +27,8 @@ entry: ; ALL: ll $[[R1:[0-9]+]], 0($[[R0]]) ; ALL: addu $[[R2:[0-9]+]], $[[R1]], $4 ; ALL: sc $[[R2]], 0($[[R0]]) -; ALL: beqz $[[R2]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]] +; MICROMIPS: beqzc $[[R2]], $[[BB0]] } define i32 @AtomicLoadNand32(i32 signext %incr) nounwind { @@ -44,7 +46,8 @@ entry: ; ALL: and $[[R3:[0-9]+]], $[[R1]], $4 ; ALL: nor $[[R2:[0-9]+]], $zero, $[[R3]] ; ALL: sc $[[R2]], 0($[[R0]]) -; ALL: beqz $[[R2]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]] +; MICROMIPS: beqzc $[[R2]], $[[BB0]] } define i32 @AtomicSwap32(i32 signext %newval) nounwind { @@ -63,7 +66,8 @@ entry: ; ALL: $[[BB0:[A-Z_0-9]+]]: ; ALL: ll ${{[0-9]+}}, 0($[[R0]]) ; ALL: sc $[[R2:[0-9]+]], 0($[[R0]]) -; ALL: beqz $[[R2]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]] +; MICROMIPS: beqzc $[[R2]], $[[BB0]] } define i32 @AtomicCmpSwap32(i32 signext %oldval, i32 signext %newval) nounwind { @@ -84,7 +88,8 @@ entry: ; ALL: ll $2, 0($[[R0]]) ; ALL: bne $2, $4, $[[BB1:[A-Z_0-9]+]] ; ALL: sc $[[R2:[0-9]+]], 0($[[R0]]) -; ALL: beqz $[[R2]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]] +; MICROMIPS: beqzc $[[R2]], $[[BB0]] ; ALL: $[[BB1]]: } @@ -120,7 +125,8 @@ entry: ; ALL: and $[[R13:[0-9]+]], $[[R10]], $[[R8]] ; ALL: or $[[R14:[0-9]+]], $[[R13]], $[[R12]] ; ALL: sc $[[R14]], 0($[[R2]]) -; ALL: beqz $[[R14]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R14]], $[[BB0]] +; MICROMIPS: beqzc $[[R14]], $[[BB0]] ; ALL: and $[[R15:[0-9]+]], $[[R10]], $[[R7]] ; ALL: srlv $[[R16:[0-9]+]], $[[R15]], $[[R5]] @@ -159,7 +165,8 @@ entry: ; ALL: and $[[R13:[0-9]+]], $[[R10]], $[[R8]] ; ALL: or $[[R14:[0-9]+]], $[[R13]], $[[R12]] ; ALL: sc $[[R14]], 0($[[R2]]) -; ALL: beqz $[[R14]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R14]], $[[BB0]] +; MICROMIPS: beqzc $[[R14]], $[[BB0]] ; ALL: and $[[R15:[0-9]+]], $[[R10]], $[[R7]] ; ALL: srlv $[[R16:[0-9]+]], $[[R15]], $[[R5]] @@ -199,7 +206,8 @@ entry: ; ALL: and $[[R13:[0-9]+]], $[[R10]], $[[R8]] ; ALL: or $[[R14:[0-9]+]], $[[R13]], $[[R12]] ; ALL: sc $[[R14]], 0($[[R2]]) -; ALL: beqz $[[R14]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R14]], $[[BB0]] +; MICROMIPS: beqzc $[[R14]], $[[BB0]] ; ALL: and $[[R15:[0-9]+]], $[[R10]], $[[R7]] ; ALL: srlv $[[R16:[0-9]+]], $[[R15]], $[[R5]] @@ -237,7 +245,8 @@ entry: ; ALL: and $[[R13:[0-9]+]], $[[R10]], $[[R8]] ; ALL: or $[[R14:[0-9]+]], $[[R13]], $[[R18]] ; ALL: sc $[[R14]], 0($[[R2]]) -; ALL: beqz $[[R14]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R14]], $[[BB0]] +; MICROMIPS: beqzc $[[R14]], $[[BB0]] ; ALL: and $[[R15:[0-9]+]], $[[R10]], $[[R7]] ; ALL: srlv $[[R16:[0-9]+]], $[[R15]], $[[R5]] @@ -282,7 +291,8 @@ entry: ; ALL: and $[[R15:[0-9]+]], $[[R13]], $[[R8]] ; ALL: or $[[R16:[0-9]+]], $[[R15]], $[[R12]] ; ALL: sc $[[R16]], 0($[[R2]]) -; ALL: beqz $[[R16]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R16]], $[[BB0]] +; MICROMIPS: beqzc $[[R16]], $[[BB0]] ; ALL: $[[BB1]]: ; ALL: srlv $[[R17:[0-9]+]], $[[R14]], $[[R5]] @@ -322,7 +332,8 @@ entry: ; ALL: and $[[R15:[0-9]+]], $[[R13]], $[[R8]] ; ALL: or $[[R16:[0-9]+]], $[[R15]], $[[R12]] ; ALL: sc $[[R16]], 0($[[R2]]) -; ALL: beqz $[[R16]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R16]], $[[BB0]] +; MICROMIPS: beqzc $[[R16]], $[[BB0]] ; ALL: $[[BB1]]: ; ALL: srlv $[[R17:[0-9]+]], $[[R14]], $[[R5]] @@ -367,7 +378,8 @@ entry: ; ALL: and $[[R13:[0-9]+]], $[[R10]], $[[R8]] ; ALL: or $[[R14:[0-9]+]], $[[R13]], $[[R12]] ; ALL: sc $[[R14]], 0($[[R2]]) -; ALL: beqz $[[R14]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R14]], $[[BB0]] +; MICROMIPS: beqzc $[[R14]], $[[BB0]] ; ALL: and $[[R15:[0-9]+]], $[[R10]], $[[R7]] ; ALL: srlv $[[R16:[0-9]+]], $[[R15]], $[[R5]] @@ -430,5 +442,6 @@ entry: ; ALL: ll $[[R1:[0-9]+]], 0($[[PTR]]) ; ALL: addu $[[R2:[0-9]+]], $[[R1]], $4 ; ALL: sc $[[R2]], 0($[[PTR]]) -; ALL: beqz $[[R2]], $[[BB0]] +; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]] +; MICROMIPS: beqzc $[[R2]], $[[BB0]] } |