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| author | Matheus Almeida <matheus.almeida@imgtec.com> | 2013-11-11 16:31:46 +0000 |
|---|---|---|
| committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2013-11-11 16:31:46 +0000 |
| commit | 9d48b69e3760bff357b8d0c20e9b68019498049e (patch) | |
| tree | 672f6d7a29a50269d45911c16b010f61c258bae5 /test/CodeGen/Mips/msa | |
| parent | 4921d5b0a9b70d201f18804452aeb62f1c41fcc3 (diff) | |
| download | external_llvm-9d48b69e3760bff357b8d0c20e9b68019498049e.zip external_llvm-9d48b69e3760bff357b8d0c20e9b68019498049e.tar.gz external_llvm-9d48b69e3760bff357b8d0c20e9b68019498049e.tar.bz2 | |
[mips][msa] CHECK-DAG-ize MSA 2rf_float_int.ll test.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194389 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/msa')
| -rw-r--r-- | test/CodeGen/Mips/msa/2rf_float_int.ll | 32 |
1 files changed, 20 insertions, 12 deletions
diff --git a/test/CodeGen/Mips/msa/2rf_float_int.ll b/test/CodeGen/Mips/msa/2rf_float_int.ll index e0a60d6..1dbb228 100644 --- a/test/CodeGen/Mips/msa/2rf_float_int.ll +++ b/test/CodeGen/Mips/msa/2rf_float_int.ll @@ -17,9 +17,11 @@ entry: declare <4 x float> @llvm.mips.ffint.s.w(<4 x i32>) nounwind ; CHECK: llvm_mips_ffint_s_w_test: -; CHECK: ld.w -; CHECK: ffint_s.w -; CHECK: st.w +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_s_w_ARG1) +; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_s.w [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_s_w_RES) +; CHECK-DAG: st.w [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_s_w_test ; @llvm_mips_ffint_s_d_ARG1 = global <2 x i64> <i64 0, i64 1>, align 16 @@ -36,9 +38,11 @@ entry: declare <2 x double> @llvm.mips.ffint.s.d(<2 x i64>) nounwind ; CHECK: llvm_mips_ffint_s_d_test: -; CHECK: ld.d -; CHECK: ffint_s.d -; CHECK: st.d +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_s_d_ARG1) +; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_s.d [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_s_d_RES) +; CHECK-DAG: st.d [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_s_d_test ; @llvm_mips_ffint_u_w_ARG1 = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16 @@ -55,9 +59,11 @@ entry: declare <4 x float> @llvm.mips.ffint.u.w(<4 x i32>) nounwind ; CHECK: llvm_mips_ffint_u_w_test: -; CHECK: ld.w -; CHECK: ffint_u.w -; CHECK: st.w +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_u_w_ARG1) +; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_u.w [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_u_w_RES) +; CHECK-DAG: st.w [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_u_w_test ; @llvm_mips_ffint_u_d_ARG1 = global <2 x i64> <i64 0, i64 1>, align 16 @@ -74,8 +80,10 @@ entry: declare <2 x double> @llvm.mips.ffint.u.d(<2 x i64>) nounwind ; CHECK: llvm_mips_ffint_u_d_test: -; CHECK: ld.d -; CHECK: ffint_u.d -; CHECK: st.d +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_u_d_ARG1) +; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_u.d [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_u_d_RES) +; CHECK-DAG: st.d [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_u_d_test ; |