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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-11 10:14:25 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-11 10:14:25 +0000 |
commit | c879eabcc25c4099a50939ed0bca86471201b183 (patch) | |
tree | f2142226dca4dc81fee2de91c84188a70300ae10 /test/CodeGen/Mips/msa | |
parent | b9bee10b2158253e222eb8dd5f0ae0452740ace3 (diff) | |
download | external_llvm-c879eabcc25c4099a50939ed0bca86471201b183.zip external_llvm-c879eabcc25c4099a50939ed0bca86471201b183.tar.gz external_llvm-c879eabcc25c4099a50939ed0bca86471201b183.tar.bz2 |
[mips][msa] Added support for matching fmadd.[wd] from normal IR (i.e. not intrinsics)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192430 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/msa')
-rw-r--r-- | test/CodeGen/Mips/msa/arithmetic_float.ll | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/msa/arithmetic_float.ll b/test/CodeGen/Mips/msa/arithmetic_float.ll index 82e05ad..70167ef 100644 --- a/test/CodeGen/Mips/msa/arithmetic_float.ll +++ b/test/CodeGen/Mips/msa/arithmetic_float.ll @@ -96,6 +96,46 @@ define void @mul_v2f64(<2 x double>* %c, <2 x double>* %a, <2 x double>* %b) nou ; CHECK: .size mul_v2f64 } +define void @fma_v4f32(<4 x float>* %d, <4 x float>* %a, <4 x float>* %b, + <4 x float>* %c) nounwind { + ; CHECK: fma_v4f32: + + %1 = load <4 x float>* %a + ; CHECK-DAG: ld.w [[R1:\$w[0-9]+]], 0($5) + %2 = load <4 x float>* %b + ; CHECK-DAG: ld.w [[R2:\$w[0-9]+]], 0($6) + %3 = load <4 x float>* %c + ; CHECK-DAG: ld.w [[R3:\$w[0-9]+]], 0($7) + %4 = tail call <4 x float> @llvm.fma.v4f32 (<4 x float> %1, <4 x float> %2, + <4 x float> %3) + ; CHECK-DAG: fmadd.w [[R1]], [[R2]], [[R3]] + store <4 x float> %4, <4 x float>* %d + ; CHECK-DAG: st.w [[R1]], 0($4) + + ret void + ; CHECK: .size fma_v4f32 +} + +define void @fma_v2f64(<2 x double>* %d, <2 x double>* %a, <2 x double>* %b, + <2 x double>* %c) nounwind { + ; CHECK: fma_v2f64: + + %1 = load <2 x double>* %a + ; CHECK-DAG: ld.d [[R1:\$w[0-9]+]], 0($5) + %2 = load <2 x double>* %b + ; CHECK-DAG: ld.d [[R2:\$w[0-9]+]], 0($6) + %3 = load <2 x double>* %c + ; CHECK-DAG: ld.d [[R3:\$w[0-9]+]], 0($7) + %4 = tail call <2 x double> @llvm.fma.v2f64 (<2 x double> %1, <2 x double> %2, + <2 x double> %3) + ; CHECK-DAG: fmadd.d [[R1]], [[R2]], [[R3]] + store <2 x double> %4, <2 x double>* %d + ; CHECK-DAG: st.d [[R1]], 0($4) + + ret void + ; CHECK: .size fma_v2f64 +} + define void @fdiv_v4f32(<4 x float>* %c, <4 x float>* %a, <4 x float>* %b) nounwind { ; CHECK: fdiv_v4f32: @@ -298,5 +338,9 @@ define void @ftrunc_s_v2f64(<2 x i64>* %c, <2 x double>* %a) nounwind { declare <4 x float> @llvm.fabs.v4f32(<4 x float> %Val) declare <2 x double> @llvm.fabs.v2f64(<2 x double> %Val) +declare <4 x float> @llvm.fma.v4f32(<4 x float> %a, <4 x float> %b, + <4 x float> %c) +declare <2 x double> @llvm.fma.v2f64(<2 x double> %a, <2 x double> %b, + <2 x double> %c) declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %Val) declare <2 x double> @llvm.sqrt.v2f64(<2 x double> %Val) |