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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/Mips/selle.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/Mips/selle.ll')
| -rw-r--r-- | test/CodeGen/Mips/selle.ll | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/test/CodeGen/Mips/selle.ll b/test/CodeGen/Mips/selle.ll index b27df45..1adefb7 100644 --- a/test/CodeGen/Mips/selle.ll +++ b/test/CodeGen/Mips/selle.ll @@ -13,65 +13,65 @@ define void @calc_z() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" { entry: - %0 = load i32* @a, align 4 - %1 = load i32* @b, align 4 + %0 = load i32, i32* @a, align 4 + %1 = load i32, i32* @b, align 4 %cmp = icmp sle i32 %0, %1 br i1 %cmp, label %cond.true, label %cond.false cond.true: ; preds = %entry - %2 = load i32* @t, align 4 + %2 = load i32, i32* @t, align 4 br label %cond.end cond.false: ; preds = %entry - %3 = load i32* @f, align 4 + %3 = load i32, i32* @f, align 4 br label %cond.end cond.end: ; preds = %cond.false, %cond.true %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ] store i32 %cond, i32* @z1, align 4 - %4 = load i32* @b, align 4 - %5 = load i32* @a, align 4 + %4 = load i32, i32* @b, align 4 + %5 = load i32, i32* @a, align 4 %cmp1 = icmp sle i32 %4, %5 br i1 %cmp1, label %cond.true2, label %cond.false3 cond.true2: ; preds = %cond.end - %6 = load i32* @f, align 4 + %6 = load i32, i32* @f, align 4 br label %cond.end4 cond.false3: ; preds = %cond.end - %7 = load i32* @t, align 4 + %7 = load i32, i32* @t, align 4 br label %cond.end4 cond.end4: ; preds = %cond.false3, %cond.true2 %cond5 = phi i32 [ %6, %cond.true2 ], [ %7, %cond.false3 ] store i32 %cond5, i32* @z2, align 4 - %8 = load i32* @c, align 4 - %9 = load i32* @a, align 4 + %8 = load i32, i32* @c, align 4 + %9 = load i32, i32* @a, align 4 %cmp6 = icmp sle i32 %8, %9 br i1 %cmp6, label %cond.true7, label %cond.false8 cond.true7: ; preds = %cond.end4 - %10 = load i32* @t, align 4 + %10 = load i32, i32* @t, align 4 br label %cond.end9 cond.false8: ; preds = %cond.end4 - %11 = load i32* @f, align 4 + %11 = load i32, i32* @f, align 4 br label %cond.end9 cond.end9: ; preds = %cond.false8, %cond.true7 %cond10 = phi i32 [ %10, %cond.true7 ], [ %11, %cond.false8 ] store i32 %cond10, i32* @z3, align 4 - %12 = load i32* @a, align 4 - %13 = load i32* @c, align 4 + %12 = load i32, i32* @a, align 4 + %13 = load i32, i32* @c, align 4 %cmp11 = icmp sle i32 %12, %13 br i1 %cmp11, label %cond.true12, label %cond.false13 cond.true12: ; preds = %cond.end9 - %14 = load i32* @t, align 4 + %14 = load i32, i32* @t, align 4 br label %cond.end14 cond.false13: ; preds = %cond.end9 - %15 = load i32* @f, align 4 + %15 = load i32, i32* @f, align 4 br label %cond.end14 cond.end14: ; preds = %cond.false13, %cond.true12 |