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author | Reed Kotler <rkotler@mips.com> | 2013-02-22 05:10:51 +0000 |
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committer | Reed Kotler <rkotler@mips.com> | 2013-02-22 05:10:51 +0000 |
commit | 7617d032ae12ba96ad65f37d91274e6f8c14e690 (patch) | |
tree | 57f37c1fcdf1c6b1299968991d1b02883e3f6079 /test/CodeGen/Mips | |
parent | b704ffbb46cae716dc51bd8e6ba425c0a4949a47 (diff) | |
download | external_llvm-7617d032ae12ba96ad65f37d91274e6f8c14e690.zip external_llvm-7617d032ae12ba96ad65f37d91274e6f8c14e690.tar.gz external_llvm-7617d032ae12ba96ad65f37d91274e6f8c14e690.tar.bz2 |
Expand mips16 SelT form pseudso/macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175862 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips')
-rw-r--r-- | test/CodeGen/Mips/selTBteqzCmpi.ll | 26 | ||||
-rw-r--r-- | test/CodeGen/Mips/selTBtnezCmpi.ll | 26 | ||||
-rw-r--r-- | test/CodeGen/Mips/selTBtnezSlti.ll | 25 | ||||
-rw-r--r-- | test/CodeGen/Mips/selgek.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Mips/selltk.ll | 1 | ||||
-rw-r--r-- | test/CodeGen/Mips/selne.ll | 1 | ||||
-rw-r--r-- | test/CodeGen/Mips/selpat.ll | 8 |
7 files changed, 85 insertions, 4 deletions
diff --git a/test/CodeGen/Mips/selTBteqzCmpi.ll b/test/CodeGen/Mips/selTBteqzCmpi.ll new file mode 100644 index 0000000..9cb8227 --- /dev/null +++ b/test/CodeGen/Mips/selTBteqzCmpi.ll @@ -0,0 +1,26 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16 + +@i = global i32 1, align 4 +@j = global i32 2, align 4 +@a = global i32 5, align 4 +@.str = private unnamed_addr constant [8 x i8] c"%i = 2\0A\00", align 1 +@k = common global i32 0, align 4 + +define void @t() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" { +entry: + %0 = load i32* @a, align 4 + %cmp = icmp eq i32 %0, 10 + %1 = load i32* @i, align 4 + %2 = load i32* @j, align 4 + %cond = select i1 %cmp, i32 %1, i32 %2 + store i32 %cond, i32* @i, align 4 + ret void +} + +attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" } + + +; 16: cmpi ${{[0-9]+}}, 10 +; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} + + diff --git a/test/CodeGen/Mips/selTBtnezCmpi.ll b/test/CodeGen/Mips/selTBtnezCmpi.ll new file mode 100644 index 0000000..bd334f5 --- /dev/null +++ b/test/CodeGen/Mips/selTBtnezCmpi.ll @@ -0,0 +1,26 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16 + +@i = global i32 1, align 4 +@j = global i32 2, align 4 +@a = global i32 5, align 4 +@.str = private unnamed_addr constant [8 x i8] c"%i = 1\0A\00", align 1 +@k = common global i32 0, align 4 + +define void @t() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" { +entry: + %0 = load i32* @a, align 4 + %cmp = icmp ne i32 %0, 10 + %1 = load i32* @i, align 4 + %2 = load i32* @j, align 4 + %cond = select i1 %cmp, i32 %1, i32 %2 + store i32 %cond, i32* @i, align 4 + ret void +} + +; 16: cmpi ${{[0-9]+}}, 10 +; 16: btnez $BB{{[0-9]+}}_{{[0-9]}} + + +attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" } + + diff --git a/test/CodeGen/Mips/selTBtnezSlti.ll b/test/CodeGen/Mips/selTBtnezSlti.ll new file mode 100644 index 0000000..593f6f2 --- /dev/null +++ b/test/CodeGen/Mips/selTBtnezSlti.ll @@ -0,0 +1,25 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16 + +@i = global i32 1, align 4 +@j = global i32 2, align 4 +@a = global i32 5, align 4 +@.str = private unnamed_addr constant [9 x i8] c"%i = 2 \0A\00", align 1 +@k = common global i32 0, align 4 + +define void @t() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" { +entry: + %0 = load i32* @a, align 4 + %cmp = icmp slt i32 %0, 10 + %1 = load i32* @j, align 4 + %2 = load i32* @i, align 4 + %cond = select i1 %cmp, i32 %1, i32 %2 + store i32 %cond, i32* @i, align 4 + ret void +} + +attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" } + +; 16: slti ${{[0-9]+}}, 10 +; 16: btnez $BB{{[0-9]+}}_{{[0-9]}} + + diff --git a/test/CodeGen/Mips/selgek.ll b/test/CodeGen/Mips/selgek.ll index 0574d0d..8ab4046 100644 --- a/test/CodeGen/Mips/selgek.ll +++ b/test/CodeGen/Mips/selgek.ll @@ -90,3 +90,5 @@ attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" } ; 16: slti ${{[0-9]+}}, 2 # 16 bit inst ; 16: btnez $BB{{[0-9]+}}_{{[0-9]}} + + diff --git a/test/CodeGen/Mips/selltk.ll b/test/CodeGen/Mips/selltk.ll index e0b2af2..1471b89 100644 --- a/test/CodeGen/Mips/selltk.ll +++ b/test/CodeGen/Mips/selltk.ll @@ -90,3 +90,4 @@ attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" } ; 16: slti ${{[0-9]+}}, 3 # 16 bit inst ; 16: btnez $BB{{[0-9]+}}_{{[0-9]}} + diff --git a/test/CodeGen/Mips/selne.ll b/test/CodeGen/Mips/selne.ll index 2987a9f..e3d82b8 100644 --- a/test/CodeGen/Mips/selne.ll +++ b/test/CodeGen/Mips/selne.ll @@ -94,3 +94,4 @@ attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" } ; 16: cmp ${{[0-9]+}}, ${{[0-9]+}} ; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} + diff --git a/test/CodeGen/Mips/selpat.ll b/test/CodeGen/Mips/selpat.ll index 57cc126..721cb9f 100644 --- a/test/CodeGen/Mips/selpat.ll +++ b/test/CodeGen/Mips/selpat.ll @@ -41,7 +41,7 @@ entry: %cond = select i1 %cmp, i32 %1, i32 %2 store i32 %cond, i32* @z1, align 4 ; 16: cmpi ${{[0-9]+}}, 1 -; 16: bteqz .+4 +; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} ; 16: move ${{[0-9]+}}, ${{[0-9]+}} %cmp1 = icmp eq i32 %0, 10 %cond5 = select i1 %cmp1, i32 %2, i32 %1 @@ -51,7 +51,7 @@ entry: %cond10 = select i1 %cmp6, i32 %2, i32 %1 store i32 %cond10, i32* @z3, align 4 ; 16: cmpi ${{[0-9]+}}, 10 -; 16: bteqz .+4 +; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} ; 16: move ${{[0-9]+}}, ${{[0-9]+}} %cmp11 = icmp eq i32 %3, 10 %cond15 = select i1 %cmp11, i32 %1, i32 %2 @@ -212,7 +212,7 @@ entry: %cond = select i1 %cmp, i32 %1, i32 %2 store i32 %cond, i32* @z1, align 4 ; 16: cmpi ${{[0-9]+}}, 1 -; 16: btnez .+4 +; 16: btnez $BB{{[0-9]+}}_{{[0-9]}} ; 16: move ${{[0-9]+}}, ${{[0-9]+}} %cmp1 = icmp ne i32 %0, 10 %cond5 = select i1 %cmp1, i32 %2, i32 %1 @@ -222,7 +222,7 @@ entry: %cond10 = select i1 %cmp6, i32 %2, i32 %1 store i32 %cond10, i32* @z3, align 4 ; 16: cmpi ${{[0-9]+}}, 10 -; 16: btnez .+4 +; 16: btnez $BB{{[0-9]+}}_{{[0-9]}} ; 16: move ${{[0-9]+}}, ${{[0-9]+}} %cmp11 = icmp ne i32 %3, 10 %cond15 = select i1 %cmp11, i32 %1, i32 %2 |