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author | Justin Holewinski <jholewinski@nvidia.com> | 2013-07-26 13:28:29 +0000 |
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committer | Justin Holewinski <jholewinski@nvidia.com> | 2013-07-26 13:28:29 +0000 |
commit | 320185fa5f5838b3892962f6e91083e9729cd946 (patch) | |
tree | f7f8866b408f466375b99c6430bb5d88e9b0e6f3 /test/CodeGen/NVPTX | |
parent | c735c1c2aed2cbaeb61296f4269535b5d13d8b0a (diff) | |
download | external_llvm-320185fa5f5838b3892962f6e91083e9729cd946.zip external_llvm-320185fa5f5838b3892962f6e91083e9729cd946.tar.gz external_llvm-320185fa5f5838b3892962f6e91083e9729cd946.tar.bz2 |
Add a target legalize hook for SplitVectorOperand (again)
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.
This also adds a test case for NVPTX that depends on this custom
legalization.
Differential Revision: http://llvm-reviews.chandlerc.com/D1195
Attempt to fix the buildbots by making the X86 test I just added platform independent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187202 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/NVPTX')
-rw-r--r-- | test/CodeGen/NVPTX/vector-stores.ll | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/test/CodeGen/NVPTX/vector-stores.ll b/test/CodeGen/NVPTX/vector-stores.ll new file mode 100644 index 0000000..4941812 --- /dev/null +++ b/test/CodeGen/NVPTX/vector-stores.ll @@ -0,0 +1,30 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s + +; CHECK: .visible .func foo1 +; CHECK: st.v2.f32 +define void @foo1(<2 x float> %val, <2 x float>* %ptr) { + store <2 x float> %val, <2 x float>* %ptr + ret void +} + +; CHECK: .visible .func foo2 +; CHECK: st.v4.f32 +define void @foo2(<4 x float> %val, <4 x float>* %ptr) { + store <4 x float> %val, <4 x float>* %ptr + ret void +} + +; CHECK: .visible .func foo3 +; CHECK: st.v2.u32 +define void @foo3(<2 x i32> %val, <2 x i32>* %ptr) { + store <2 x i32> %val, <2 x i32>* %ptr + ret void +} + +; CHECK: .visible .func foo4 +; CHECK: st.v4.u32 +define void @foo4(<4 x i32> %val, <4 x i32>* %ptr) { + store <4 x i32> %val, <4 x i32>* %ptr + ret void +} + |