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author | Justin Holewinski <justin.holewinski@gmail.com> | 2011-06-17 12:12:42 +0000 |
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committer | Justin Holewinski <justin.holewinski@gmail.com> | 2011-06-17 12:12:42 +0000 |
commit | 707fd44038edf9ec0d3fe7b99d51e7c71e36f9d0 (patch) | |
tree | 85388ccb43c10f0f9e8bd902b7a794e2071fd943 /test/CodeGen/PTX/add.ll | |
parent | f1b7e94add71403c52ae00faf7b0528b76fb6e55 (diff) | |
download | external_llvm-707fd44038edf9ec0d3fe7b99d51e7c71e36f9d0.zip external_llvm-707fd44038edf9ec0d3fe7b99d51e7c71e36f9d0.tar.gz external_llvm-707fd44038edf9ec0d3fe7b99d51e7c71e36f9d0.tar.bz2 |
PTX: Adjust rounding modes
* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)
Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.
All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133253 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PTX/add.ll')
-rw-r--r-- | test/CodeGen/PTX/add.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/PTX/add.ll b/test/CodeGen/PTX/add.ll index b89a2f6..c16be49 100644 --- a/test/CodeGen/PTX/add.ll +++ b/test/CodeGen/PTX/add.ll @@ -22,14 +22,14 @@ define ptx_device i64 @t1_u64(i64 %x, i64 %y) { } define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: add.f32 r0, r1, r2 +; CHECK: add.rn.f32 r0, r1, r2 ; CHECK-NEXT: ret; %z = fadd float %x, %y ret float %z } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: add.f64 rd0, rd1, rd2 +; CHECK: add.rn.f64 rd0, rd1, rd2 ; CHECK-NEXT: ret; %z = fadd double %x, %y ret double %z @@ -57,14 +57,14 @@ define ptx_device i64 @t2_u64(i64 %x) { } define ptx_device float @t2_f32(float %x) { -; CHECK: add.f32 r0, r1, 0F3F800000; +; CHECK: add.rn.f32 r0, r1, 0F3F800000; ; CHECK-NEXT: ret; %z = fadd float %x, 1.0 ret float %z } define ptx_device double @t2_f64(double %x) { -; CHECK: add.f64 rd0, rd1, 0D3FF0000000000000; +; CHECK: add.rn.f64 rd0, rd1, 0D3FF0000000000000; ; CHECK-NEXT: ret; %z = fadd double %x, 1.0 ret double %z |