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author | Justin Holewinski <justin.holewinski@gmail.com> | 2011-06-23 18:10:13 +0000 |
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committer | Justin Holewinski <justin.holewinski@gmail.com> | 2011-06-23 18:10:13 +0000 |
commit | d8149c1bef75e15010cce4c4510b7f68ecde80a5 (patch) | |
tree | 699f83cd91c6be62803764fb54e2b158dcae6353 /test/CodeGen/PTX/shr.ll | |
parent | 6b1131e5ff1543dbc1f2cf5d64dcecab42516c51 (diff) | |
download | external_llvm-d8149c1bef75e15010cce4c4510b7f68ecde80a5.zip external_llvm-d8149c1bef75e15010cce4c4510b7f68ecde80a5.tar.gz external_llvm-d8149c1bef75e15010cce4c4510b7f68ecde80a5.tar.bz2 |
PTX: Always use registers for return values, but use .param space for device
parameters if SM >= 2.0
- Update test cases to be more robust against register allocation changes
- Bump up the number of registers to 128 per type
- Include Python script to re-generate register file with any number of
registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133736 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PTX/shr.ll')
-rw-r--r-- | test/CodeGen/PTX/shr.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/PTX/shr.ll b/test/CodeGen/PTX/shr.ll index 8693e0e..cb57546 100644 --- a/test/CodeGen/PTX/shr.ll +++ b/test/CodeGen/PTX/shr.ll @@ -1,42 +1,42 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @t1(i32 %x, i32 %y) { -; CHECK: shr.u32 r0, r1, r2 +; CHECK: shr.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} %z = lshr i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t2(i32 %x) { -; CHECK: shr.u32 r0, r1, 3 +; CHECK: shr.u32 r{{[0-9]+}}, r{{[0-9]+}}, 3 %z = lshr i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t3(i32 %x) { -; CHECK: shr.u32 r0, 3, r1 +; CHECK: shr.u32 r{{[0-9]+}}, 3, r{{[0-9]+}} %z = lshr i32 3, %x ; CHECK: ret; ret i32 %z } define ptx_device i32 @t4(i32 %x, i32 %y) { -; CHECK: shr.s32 r0, r1, r2 +; CHECK: shr.s32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} %z = ashr i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t5(i32 %x) { -; CHECK: shr.s32 r0, r1, 3 +; CHECK: shr.s32 r{{[0-9]+}}, r{{[0-9]+}}, 3 %z = ashr i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t6(i32 %x) { -; CHECK: shr.s32 r0, -3, r1 +; CHECK: shr.s32 r{{[0-9]+}}, -3, r{{[0-9]+}} %z = ashr i32 -3, %x ; CHECK: ret; ret i32 %z |