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author | Dan Gohman <djg@cray.com> | 2007-07-18 16:29:46 +0000 |
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committer | Dan Gohman <djg@cray.com> | 2007-07-18 16:29:46 +0000 |
commit | f17a25c88b892d30c2b41ba7ecdfbdfb2b4be9cc (patch) | |
tree | ebb79ea1ee5e3bc1fdf38541a811a8b804f0679a /test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll | |
download | external_llvm-f17a25c88b892d30c2b41ba7ecdfbdfb2b4be9cc.zip external_llvm-f17a25c88b892d30c2b41ba7ecdfbdfb2b4be9cc.tar.gz external_llvm-f17a25c88b892d30c2b41ba7ecdfbdfb2b4be9cc.tar.bz2 |
It's not necessary to do rounding for alloca operations when the requested
alignment is equal to the stack alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40004 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll')
-rw-r--r-- | test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll new file mode 100644 index 0000000..59f7ed4 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll @@ -0,0 +1,72 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 + +void %test(sbyte* %stack) { +entry: + %tmp9 = seteq int 0, 0 ; <bool> [#uses=1] + %tmp30 = seteq uint 0, 0 ; <bool> [#uses=1] + br bool %tmp30, label %cond_next54, label %cond_true31 + +cond_true860: ; preds = %bb855 + %tmp879 = tail call <4 x float> %llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1] + %tmp880 = cast <4 x float> %tmp879 to <4 x int> ; <<4 x int>> [#uses=2] + %tmp883 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 1, uint 1, uint 1, uint 1 > ; <<4 x int>> [#uses=1] + %tmp883 = cast <4 x int> %tmp883 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp885 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 2, uint 2, uint 2, uint 2 > ; <<4 x int>> [#uses=1] + %tmp885 = cast <4 x int> %tmp885 to <4 x float> ; <<4 x float>> [#uses=1] + br label %cond_next905 + +cond_true31: ; preds = %entry + ret void + +cond_next54: ; preds = %entry + br bool %tmp9, label %cond_false385, label %bb279 + +bb279: ; preds = %cond_next54 + ret void + +cond_false385: ; preds = %cond_next54 + %tmp388 = seteq uint 0, 0 ; <bool> [#uses=1] + br bool %tmp388, label %cond_next463, label %cond_true389 + +cond_true389: ; preds = %cond_false385 + ret void + +cond_next463: ; preds = %cond_false385 + %tmp1208107 = setgt sbyte* null, %stack ; <bool> [#uses=1] + br bool %tmp1208107, label %cond_true1209.preheader, label %bb1212 + +cond_true498: ; preds = %cond_true1209.preheader + ret void + +cond_true519: ; preds = %cond_true1209.preheader + %bothcond = or bool false, false ; <bool> [#uses=1] + br bool %bothcond, label %bb855, label %bb980 + +cond_false548: ; preds = %cond_true1209.preheader + ret void + +bb855: ; preds = %cond_true519 + %tmp859 = seteq int 0, 0 ; <bool> [#uses=1] + br bool %tmp859, label %cond_true860, label %cond_next905 + +cond_next905: ; preds = %bb855, %cond_true860 + %vfpw2.4 = phi <4 x float> [ %tmp885, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0] + %vfpw1.4 = phi <4 x float> [ %tmp883, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0] + %tmp930 = cast <4 x float> zeroinitializer to <4 x int> ; <<4 x int>> [#uses=0] + ret void + +bb980: ; preds = %cond_true519 + ret void + +cond_true1209.preheader: ; preds = %cond_next463 + %tmp496 = and uint 0, 12288 ; <uint> [#uses=1] + switch uint %tmp496, label %cond_false548 [ + uint 0, label %cond_true498 + uint 4096, label %cond_true519 + ] + +bb1212: ; preds = %cond_next463 + ret void +} + +declare <4 x float> %llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>) |