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authorEvan Cheng <evan.cheng@apple.com>2007-09-11 22:34:47 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-09-11 22:34:47 +0000
commit6d6d352ed9bf69f06d8084b76042d7e9b3980cb5 (patch)
tree330dadf663f20b5312d14120cd31f3c204f3d452 /test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll
parent01537324ba3fa6af36428c5f0d4f07fdd76fb99f (diff)
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Sometimes a MI can define a register as well as defining a super-register at the
same time. Do not mark the "smaller" def as dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41871 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll')
-rw-r--r--test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll9
1 files changed, 9 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll b/test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll
new file mode 100644
index 0000000..bb7aba4
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=ppc64
+
+ %struct.TCMalloc_SpinLock = type { i32 }
+
+define void @_ZN17TCMalloc_SpinLock4LockEv(%struct.TCMalloc_SpinLock* %this) {
+entry:
+ %tmp3 = call i32 asm sideeffect "1: lwarx $0, 0, $1\0A\09stwcx. $2, 0, $1\0A\09bne- 1b\0A\09isync", "=&r,=*r,r,1,~{dirflag},~{fpsr},~{flags},~{memory}"( i32** null, i32 1, i32* null ) ; <i32> [#uses=0]
+ unreachable
+}