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| author | Hal Finkel <hfinkel@anl.gov> | 2011-12-30 00:34:00 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2011-12-30 00:34:00 +0000 |
| commit | 2e95afa04cd1c89de7e4abaeead66cd8e51ec929 (patch) | |
| tree | 9d3c5d3643df8e1a13804999ee6170ce76241bff /test/CodeGen/PowerPC/Frames-large.ll | |
| parent | ed23bdb65fe86cdb7a38c8c1998ec965e6973966 (diff) | |
| download | external_llvm-2e95afa04cd1c89de7e4abaeead66cd8e51ec929.zip external_llvm-2e95afa04cd1c89de7e4abaeead66cd8e51ec929.tar.gz external_llvm-2e95afa04cd1c89de7e4abaeead66cd8e51ec929.tar.bz2 | |
Cleanup stack/frame register define/kill states. This fixes two bugs:
1. The ST*UX instructions that store and update the stack pointer did not set define/kill on R1. This became a problem when I activated post-RA scheduling (and had incorrectly adjusted the Frames-large test).
2. eliminateFrameIndex did not kill its scavenged temporary register, and this could cause the scavenger to exhaust all available registers (and its emergency spill slot) when there were a lot of CR values to spill. The 2010-02-12-saveCR test has been adjusted to check for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147359 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/Frames-large.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/Frames-large.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/PowerPC/Frames-large.ll b/test/CodeGen/PowerPC/Frames-large.ll index a2af87e..d07fea7 100644 --- a/test/CodeGen/PowerPC/Frames-large.ll +++ b/test/CodeGen/PowerPC/Frames-large.ll @@ -15,9 +15,9 @@ define i32* @f1() nounwind { ; PPC32-NOFP: _f1: ; PPC32-NOFP: lis r0, -1 -; PPC32-NOFP: addi r3, r1, 68 ; PPC32-NOFP: ori r0, r0, 32704 ; PPC32-NOFP: stwux r1, r1, r0 +; PPC32-NOFP: addi r3, r1, 68 ; PPC32-NOFP: lwz r1, 0(r1) ; PPC32-NOFP: blr @@ -25,10 +25,10 @@ define i32* @f1() nounwind { ; PPC32-FP: _f1: ; PPC32-FP: lis r0, -1 ; PPC32-FP: stw r31, -4(r1) -; PPC32-FP: mr r31, r1 ; PPC32-FP: ori r0, r0, 32704 -; PPC32-FP: addi r3, r31, 64 ; PPC32-FP: stwux r1, r1, r0 +; PPC32-FP: mr r31, r1 +; PPC32-FP: addi r3, r31, 64 ; PPC32-FP: lwz r1, 0(r1) ; PPC32-FP: lwz r31, -4(r1) ; PPC32-FP: blr @@ -36,9 +36,9 @@ define i32* @f1() nounwind { ; PPC64-NOFP: _f1: ; PPC64-NOFP: lis r0, -1 -; PPC64-NOFP: addi r3, r1, 116 ; PPC64-NOFP: ori r0, r0, 32656 ; PPC64-NOFP: stdux r1, r1, r0 +; PPC64-NOFP: addi r3, r1, 116 ; PPC64-NOFP: ld r1, 0(r1) ; PPC64-NOFP: blr @@ -46,10 +46,10 @@ define i32* @f1() nounwind { ; PPC64-FP: _f1: ; PPC64-FP: lis r0, -1 ; PPC64-FP: std r31, -8(r1) -; PPC64-FP: mr r31, r1 ; PPC64-FP: ori r0, r0, 32640 -; PPC64-FP: addi r3, r31, 124 ; PPC64-FP: stdux r1, r1, r0 +; PPC64-FP: mr r31, r1 +; PPC64-FP: addi r3, r31, 124 ; PPC64-FP: ld r1, 0(r1) ; PPC64-FP: ld r31, -8(r1) ; PPC64-FP: blr |