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author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-03 17:59:07 +0000 |
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committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-03 17:59:07 +0000 |
commit | 33efedc0481c4b0d9866ff526eb1161372b5919f (patch) | |
tree | c00529c742b19693f0dd9a476197c8b0b87c5639 /test/CodeGen/PowerPC/crsave.ll | |
parent | 965b20e39c7fd73846e9b6ed55ba90e032ae3b1b (diff) | |
download | external_llvm-33efedc0481c4b0d9866ff526eb1161372b5919f.zip external_llvm-33efedc0481c4b0d9866ff526eb1161372b5919f.tar.gz external_llvm-33efedc0481c4b0d9866ff526eb1161372b5919f.tar.bz2 |
[PowerPC] Use mtocrf when available
Just as with mfocrf, it is also preferable to use mtocrf instead of
mtcrf when only a single CR register is to be written.
Current code however always emits mtcrf. This probably does not matter
when using an external assembler, since the GNU assembler will in fact
automatically replace mtcrf with mtocrf when possible. It does create
inefficient code with the integrated assembler, however.
To fix this, this patch adds MTOCRF/MTOCRF8 instruction patterns and
uses those instead of MTCRF/MTCRF8 everything. Just as done in the
MFOCRF patch committed as 185556, these patterns will be converted
back to MTCRF if MTOCRF is not available on the machine.
As a side effect, this allows to modify the MTCRF pattern to accept
the full range of mask operands for the benefit of the asm parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185561 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/crsave.ll')
-rw-r--r-- | test/CodeGen/PowerPC/crsave.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/PowerPC/crsave.ll b/test/CodeGen/PowerPC/crsave.ll index b15011d..a9b4b36 100644 --- a/test/CodeGen/PowerPC/crsave.ll +++ b/test/CodeGen/PowerPC/crsave.ll @@ -1,5 +1,5 @@ -; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC32 -; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC64 +; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC32 +; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC64 declare void @foo() @@ -18,7 +18,7 @@ entry: ; PPC32: mfcr 12 ; PPC32-NEXT: stw 12, 24(31) ; PPC32: lwz 12, 24(31) -; PPC32-NEXT: mtcrf 32, 12 +; PPC32-NEXT: mtocrf 32, 12 ; PPC64: .cfi_startproc ; PPC64: mfcr 12 @@ -29,7 +29,7 @@ entry: ; PPC64: .cfi_offset cr2, 8 ; PPC64: addi 1, 1, [[AMT]] ; PPC64: lwz 12, 8(1) -; PPC64: mtcrf 32, 12 +; PPC64: mtocrf 32, 12 ; PPC64: .cfi_endproc define i32 @test_cr234() nounwind { @@ -47,16 +47,16 @@ entry: ; PPC32: mfcr 12 ; PPC32-NEXT: stw 12, 24(31) ; PPC32: lwz 12, 24(31) -; PPC32-NEXT: mtcrf 32, 12 -; PPC32-NEXT: mtcrf 16, 12 -; PPC32-NEXT: mtcrf 8, 12 +; PPC32-NEXT: mtocrf 32, 12 +; PPC32-NEXT: mtocrf 16, 12 +; PPC32-NEXT: mtocrf 8, 12 ; PPC64: mfcr 12 ; PPC64: stw 12, 8(1) ; PPC64: stdu 1, -[[AMT:[0-9]+]](1) ; PPC64: addi 1, 1, [[AMT]] ; PPC64: lwz 12, 8(1) -; PPC64: mtcrf 32, 12 -; PPC64: mtcrf 16, 12 -; PPC64: mtcrf 8, 12 +; PPC64: mtocrf 32, 12 +; PPC64: mtocrf 16, 12 +; PPC64: mtocrf 8, 12 |