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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/PowerPC/ctrloop-sh.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/PowerPC/ctrloop-sh.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/ctrloop-sh.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/PowerPC/ctrloop-sh.ll b/test/CodeGen/PowerPC/ctrloop-sh.ll index d8e6fc7..540f0d6 100644 --- a/test/CodeGen/PowerPC/ctrloop-sh.ll +++ b/test/CodeGen/PowerPC/ctrloop-sh.ll @@ -9,8 +9,8 @@ entry: for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load i128* %b, align 16 - %1 = load i128* %c, align 16 + %0 = load i128, i128* %b, align 16 + %1 = load i128, i128* %c, align 16 %shl = shl i128 %0, %1 store i128 %shl, i128* %a, align 16 %inc = add nsw i32 %i.02, 1 @@ -31,8 +31,8 @@ entry: for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load i128* %b, align 16 - %1 = load i128* %c, align 16 + %0 = load i128, i128* %b, align 16 + %1 = load i128, i128* %c, align 16 %shl = ashr i128 %0, %1 store i128 %shl, i128* %a, align 16 %inc = add nsw i32 %i.02, 1 @@ -53,8 +53,8 @@ entry: for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load i128* %b, align 16 - %1 = load i128* %c, align 16 + %0 = load i128, i128* %b, align 16 + %1 = load i128, i128* %c, align 16 %shl = lshr i128 %0, %1 store i128 %shl, i128* %a, align 16 %inc = add nsw i32 %i.02, 1 |