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author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/PowerPC/fp-to-int-ext.ll | |
parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/PowerPC/fp-to-int-ext.ll')
-rw-r--r-- | test/CodeGen/PowerPC/fp-to-int-ext.ll | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/fp-to-int-ext.ll b/test/CodeGen/PowerPC/fp-to-int-ext.ll new file mode 100644 index 0000000..bfacd89 --- /dev/null +++ b/test/CodeGen/PowerPC/fp-to-int-ext.ll @@ -0,0 +1,69 @@ +; RUN: llc -mcpu=a2 < %s | FileCheck %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; Function Attrs: nounwind +define double @foo1(i32* %x) #0 { +entry: + %0 = load i32* %x, align 4 + %conv = sext i32 %0 to i64 + %conv1 = sitofp i64 %conv to double + ret double %conv1 + +; CHECK-LABEL: @foo1 +; CHECK: lfiwax [[REG1:[0-9]+]], 0, 3 +; CHECK: fcfid 1, [[REG1]] +; CHECK: blr +} + +define double @foo2(i32* %x) #0 { +entry: + %0 = load i32* %x, align 4 + %conv = zext i32 %0 to i64 + %conv1 = sitofp i64 %conv to double + ret double %conv1 + +; CHECK-LABEL: @foo2 +; CHECK: lfiwzx [[REG1:[0-9]+]], 0, 3 +; CHECK: fcfid 1, [[REG1]] +; CHECK: blr +} + +define double @foo3(i32* %x) #0 { +entry: + %0 = load i32* %x, align 4 + %1 = add i32 %0, 8 + %conv = zext i32 %1 to i64 + %conv1 = sitofp i64 %conv to double + ret double %conv1 + +; CHECK-LABEL: @foo3 +; CHECK-DAG: lwz [[REG1:[0-9]+]], 0(3) +; CHECK-DAG: addi [[REG3:[0-9]+]], 1, +; CHECK-DAG: addi [[REG2:[0-9]+]], [[REG1]], 8 +; CHECK-DAG: stw [[REG2]], +; CHECK: lfiwzx [[REG4:[0-9]+]], 0, [[REG3]] +; CHECK: fcfid 1, [[REG4]] +; CHECK: blr +} + +define double @foo4(i32* %x) #0 { +entry: + %0 = load i32* %x, align 4 + %1 = add i32 %0, 8 + %conv = sext i32 %1 to i64 + %conv1 = sitofp i64 %conv to double + ret double %conv1 + +; CHECK-LABEL: @foo4 +; CHECK-DAG: lwz [[REG1:[0-9]+]], 0(3) +; CHECK-DAG: addi [[REG3:[0-9]+]], 1, +; CHECK-DAG: addi [[REG2:[0-9]+]], [[REG1]], 8 +; CHECK-DAG: stw [[REG2]], +; CHECK: lfiwax [[REG4:[0-9]+]], 0, [[REG3]] +; CHECK: fcfid 1, [[REG4]] +; CHECK: blr +} + +attributes #0 = { nounwind } + |